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/Zephyr-latest/tests/lib/hash_map/src/
Dclear.c29 bool *cleared = (bool *)cookie; in clear_callback() local
32 cleared[key] = true; in clear_callback()
37 bool cleared[10] = {0}; in ZTEST() local
40 for (size_t i = 0; i < ARRAY_SIZE(cleared); ++i) { in ZTEST()
44 zassert_equal(ARRAY_SIZE(cleared), sys_hashmap_size(&map)); in ZTEST()
46 sys_hashmap_clear(&map, clear_callback, cleared); in ZTEST()
49 for (size_t i = 0; i < ARRAY_SIZE(cleared); ++i) { in ZTEST()
50 zassert_true(cleared[i], "entry %zu was not cleared", i + 1); in ZTEST()
/Zephyr-latest/tests/bluetooth/host/keys/bt_keys_clear/src/
Dtest_suite_bt_settings.c44 * - The key content is cleared and removed from persistent memory
62 /* Verify that memory was cleared */ in ZTEST()
64 "Key content wasn't cleared by 'bt_keys_clear()'"); in ZTEST()
82 * - The key content is cleared and removed from persistent memory
100 /* Verify that memory was cleared */ in ZTEST()
102 "Key content wasn't cleared by 'bt_keys_clear()'"); in ZTEST()
Dmain.c38 * - The key content is cleared
66 /* Verify that memory was cleared */ in ZTEST()
68 "Key content wasn't cleared by 'bt_keys_clear()'"); in ZTEST()
84 * - The key content is cleared
114 /* Verify that memory was cleared */ in ZTEST()
116 "Key content wasn't cleared by 'bt_keys_clear()'"); in ZTEST()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_nuclei_eclic.S16 * In an ECLIC, pending interrupts don't have to be cleared by hand.
17 * In vectored mode, interrupts are cleared automatically.
18 * In non-vectored mode, interrupts are cleared when writing the mnxti register (done in
Dintc_nrfx_clic.S12 * No need to clear anything, pending bit is cleared by HW.
/Zephyr-latest/tests/lib/notify/src/
Dmain.c81 "flags cleared"); in ZTEST()
87 "flags not cleared"); in ZTEST()
149 "flags cleared"); in ZTEST()
155 "flags not cleared"); in ZTEST()
217 "flags cleared"); in ZTEST()
223 "flags not cleared"); in ZTEST()
/Zephyr-latest/tests/bluetooth/host/id/bt_id_delete/src/
Dmain.c42 * - bt_dev.id_addr[] at index equals to the ID value used is cleared
43 * - bt_dev.irk[] at index equals to the ID value used is cleared (if privacy is enabled)
88 * - bt_dev.id_addr[] at index equals to the ID value used is cleared
89 * - bt_dev.irk[] at index equals to the ID value used is cleared (if privacy is enabled)
Dtest_suite_bt_settings.c33 * - bt_dev.id_addr[] at index equals to the ID value used is cleared
34 * - bt_dev.irk[] at index equals to the ID value used is cleared (if privacy is enabled)
87 * - bt_dev.id_addr[] at index equals to the ID value used is cleared
88 * - bt_dev.irk[] at index equals to the ID value used is cleared (if privacy
/Zephyr-latest/include/zephyr/sys/
Dbitarray.h102 * @param[in] bit The bit to be cleared
140 * @param[in] bit The bit to be tested and cleared
261 * Test if bits in a region is all cleared.
264 * from @p offset are all cleared.
270 * @retval true All bits are cleared.
271 * @retval false Not all bits are cleared.
294 * Test if all bits in a region are cleared/set and set/clear them
299 * -EEXIST is returned. If the whole region is set/cleared
306 * @param to_set if true the region will be set if all bits are cleared
312 * @retval -EEXIST at least one bit in the region is set/cleared,
/Zephyr-latest/drivers/hwinfo/
Dhwinfo_rw61x.c13 * which cannot be cleared, we have to "fake" this to meet the hwinfo api.
14 * Technically all the reset causes are already cleared by the ROM, but we will
/Zephyr-latest/tests/bsim/bluetooth/host/security/ccc_update/
Dprj_2.conf1 # Disable CCC lazy loading, this cause the CCC config to not be cleared at
/Zephyr-latest/arch/arm/core/cortex_m/
Dprep_c.c87 * 0x00000000. However, it might be left un-cleared by firmware running in z_arm_floating_point_init()
163 * Upon reset, the CONTROL.FPCA bit is, normally, cleared. However, in z_arm_floating_point_init()
164 * it might be left un-cleared by firmware running before Zephyr boot. in z_arm_floating_point_init()
168 * In Sharing FP Registers mode CONTROL.FPCA is cleared before switching in z_arm_floating_point_init()
171 * If CONFIG_INIT_ARCH_HW_AT_BOOT is set, CONTROL is cleared at reset. in z_arm_floating_point_init()
/Zephyr-latest/tests/subsys/portability/cmsis_rtos_v2/src/
Devent_flags.c41 * scheduled we should hence check if FLAG2 is cleared. in thread2()
100 /* Since the flags are not cleared automatically in the previous step, in test_event_flags_no_wait_timeout()
114 * though triggered, gets cleared in the previous step. in test_event_flags_no_wait_timeout()
134 /* wait for multiple flags. The flags will be cleared automatically in test_event_flags_signalled()
160 "Event with MSB set is cleared unexpectedly"); in test_event_flags_signalled()
Dthread_flags.c31 /* Since the flags are not cleared automatically in the previous step, in thread1()
43 * though triggered, gets cleared in the previous step. in thread1()
65 "Thread with MSB set is cleared unexpectedly"); in thread2()
/Zephyr-latest/include/zephyr/drivers/dma/
Ddma_mcux_lpc.h33 * When it is cleared, the hardware trigger will be edge triggered.
39 * When cleared, a single transfer (of the width selected by XFERCFG register)
/Zephyr-latest/dts/bindings/mtd/
Djedec,spi-nor-common.yaml80 Bit mask of bits of the status register that should be cleared on
88 cleared.
91 that should be cleared when the device is initialized.
/Zephyr-latest/tests/kernel/fpu_sharing/float_disable/src/
Dk_float_disable.c97 "usr_fp_thread FP options cleared"); in ZTEST()
102 /* Verify K_FP_OPTS are now cleared */ in ZTEST()
143 /* Verify K_FP_OPTS are now cleared by the user thread itself */ in ZTEST()
191 TC_ERROR("sup_fp_thread FP options cleared\n"); in sup_fp_thread_entry()
248 TC_ERROR("sup_fp_thread FP options cleared\n"); in sup_fp_thread_entry()
/Zephyr-latest/soc/nxp/s32/common/
Dmc_rgm.c68 * Register bits are cleared on write 1 if the triggering event has already in mc_rgm_clear_reset_status()
69 * been cleared at the source in mc_rgm_clear_reset_status()
83 * MC_RGM_FES must be cleared before writing 1 to any of the fields in MC_RGM_FERD, in mc_rgm_init()
/Zephyr-latest/include/zephyr/drivers/serial/
Duart_emul.h73 * @return Number of cleared bytes
82 * @return Number of cleared bytes
Duart_altera.h21 * Flag is cleared after uart_irq_callback_user_data_set is called.
/Zephyr-latest/tests/lib/mem_blocks/src/
Dmain.c264 "sys_mem_blocks_get bitmap failed, bit %i should be cleared", i); in ZTEST()
288 "sys_mem_blocks_get bitmap failed, bit %i should be cleared", i); in ZTEST()
312 "sys_mem_blocks_get bitmap failed, bit %i should be cleared", i); in ZTEST()
337 "sys_mem_blocks_get bitmap failed, bit %i should be cleared", i); in ZTEST()
362 "sys_mem_blocks_get bitmap failed, bit %i should be cleared", i); in ZTEST()
372 /* all blocks should be cleared */ in ZTEST()
378 "sys_mem_blocks_get bitmap failed, bit %i should be cleared", i); in ZTEST()
454 "sys_mem_blocks_alloc_contiguous failed, bit %i should be cleared", i); in ZTEST()
481 "sys_mem_blocks_alloc_contiguous failed, bit %i should be cleared", i); in ZTEST()
513 "sys_mem_blocks_alloc_contiguous failed, bit %i should be cleared", i); in ZTEST()
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/Zephyr-latest/include/zephyr/linker/
Dcommon-noinit.ld11 * will not be cleared during the boot process.
/Zephyr-latest/soc/mediatek/mt8xxx/
Dsoc.h16 * signaled and cleared. An interrupt is latched if any bits are
/Zephyr-latest/include/zephyr/bluetooth/mesh/
Dsol_pdu_rpl_cli.h34 * has cleared. The @c length param represents length of range cleared by server.
/Zephyr-latest/soc/nxp/imxrt/imxrt6xx/
DKconfig63 cleared, the CACHE64 controller will be disabled during SOC init

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