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/Zephyr-latest/dts/bindings/video/
Dst,stm32-dcmi.yaml4 # SPDX-License-Identifier: Apache-2.0
14 pinctrl-0 = <&dcmi_hsync_pa4 &dcmi_pixclk_pa6 &dcmi_vsync_pb7
17 pinctrl-names = "default";
18 bus-width = <8>;
19 hsync-active = <0>;
20 vsync-active = <0>;
21 pixelclk-active = <1>;
22 capture-rate = <1>;
29 remote-endpoint = <&ov2640_ep_out>;
34 compatible: "st,stm32-dcmi"
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/Zephyr-latest/tests/kernel/timer/timer_behavior/pytest/
Dsaleae_logic2.py1 # Copyright (c) 2023-2024 Intel Corporation
3 # SPDX-License-Identifier: Apache-2.0
9 # https://saleae.github.io/logic2-automation/getting_started.html
37 capture_configuration=capture_configuration) as capture:
39 capture.wait()
41 capture.export_raw_data_csv(directory=output_dir,
51 # Last sample is just captured at last moment of capture, not related
53 data = non_negative[:-1]
62 total_time = data[-1]
69 # [device-id=<device_id>,]port=<saleae_logic2_server_port>,
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/Zephyr-latest/drivers/pwm/
Dpwm_numaker.c4 * SPDX-License-Identifier: Apache-2.0
21 /* 11-bit prescaler in Numaker EPWM modules */
61 struct pwm_numaker_capture_data capture[NUMAKER_PWM_CHANNEL_COUNT]; member
67 const struct pwm_numaker_config *cfg = dev->config; in pwm_numaker_configure()
68 EPWM_T *epwm = cfg->epwm; in pwm_numaker_configure()
74 epwm->POLCTL &= ~(NUMAKER_PWM_CHANNEL_MASK << EPWM_POLCTL_PINV0_Pos); in pwm_numaker_configure()
81 const struct pwm_numaker_config *cfg = dev->config; in pwm_numaker_set_cycles()
82 struct pwm_numaker_data *data = dev->data; in pwm_numaker_set_cycles()
83 EPWM_T *epwm = cfg->epwm; in pwm_numaker_set_cycles()
86 LOG_DBG("Channel=0x%x, CAPIEN=0x%x, CAPIF=0x%x", channel, epwm->CAPIEN, in pwm_numaker_set_cycles()
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Dpwm_mchp_xec_bbled.c4 * SPDX-License-Identifier: Apache-2.0
51 * Puse_OFF_width = (1/Fpwm) * (256 - duty_cycle) seconds
52 * where duty_cycle is an 8-bit value 0 to 255.
53 * Prescale is derived from DELAY register LOW_DELAY 12-bit field
54 * Duty cycle is derived from LIMITS register MINIMUM 8-bit field
61 * BBLED PWM mode duty cycle specified by 8-bit MIN field of the LIMITS register
140 * DELAY.LO = pre-scaler = [0, 4095]
147 const struct pwm_bbled_xec_config * const cfg = dev->config; in xec_pwmbb_progam_pwm()
148 struct bbled_regs * const regs = cfg->regs; in xec_pwmbb_progam_pwm()
151 val = regs->limits & ~(XEC_PWM_BBLED_LIM_MIN_MSK); in xec_pwmbb_progam_pwm()
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/Zephyr-latest/dts/bindings/test/
Dvnd,serial.yaml5 include: uart-controller.yaml
8 baud-rate:
11 buffer-size:
13 description: "Size of buffer to capture output data or to queue input data."
/Zephyr-latest/samples/drivers/i2s/i2s_codec/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
15 int "Sample rate"
29 Count of DMIC channels to capture and process.
/Zephyr-latest/drivers/sensor/ite/ite_tach_it8xxx2/
Dtach_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
19 * Sample Rate = TACH_FREQ / 128
22 * | | | +-----------+ |
23 * | +-----+-----+ | | _ _ |<--+
24 * |------>| F1TL/MRR |<-+-| | |_| |_ |<--+
25 * | +-----------+ +-----------+ |
26 * | capture pulses T0B (GPJ2)
27 * | in sample rate
29 * +-----------+ |
30 * Crystal-->| Prescaler |--->| Tachometer 1 T1A (GPD7)
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/Zephyr-latest/boards/shields/weact_ov2640_cam_module/
Dweact_ov2640_cam_module.overlay4 * SPDX-License-Identifier: Apache-2.0
15 clock-frequency = <I2C_BITRATE_FAST>;
24 remote-endpoint = <&zephyr_camera_dvp_in>;
33 bus-width = <8>;
34 hsync-active = <0>;
35 vsync-active = <0>;
36 pixelclk-active = <1>;
37 capture-rate = <1>;
41 remote-endpoint = <&ov2640_ep_out>;
/Zephyr-latest/include/zephyr/drivers/
Dpwm.h3 * Copyright (c) 2020-2021 Vestas Wind Systems A/S
5 * SPDX-License-Identifier: Apache-2.0
34 #include <zephyr/dt-bindings/pwm/pwm.h>
41 * @name PWM capture configuration flags
54 /** PWM pin capture captures period. */
57 /** PWM pin capture captures pulse width. */
60 /** PWM pin capture captures both period and pulse width. */
64 /** PWM pin capture captures a single period/pulse width. */
67 /** PWM pin capture captures period/pulse width continuously. */
121 * pwm-names = "alpha", "beta";
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Ddai.h4 * SPDX-License-Identifier: Apache-2.0
48 * clock-related configurations w.r.t the DAI
164 /** @brief Optional - Pre Start the transmission / reception of data.
188 /** @brief Optional - Post Stop the transmission / reception of data.
259 /** Frame clock (WS) frequency, sampling rate. */
260 uint32_t rate; member
279 /** Rate in Hz, e.g. 19200000 */
283 /** Direction (playback/capture) */
303 /** Rate in Hz, e.g. 19200000 */
354 const struct dai_driver_api *api = (const struct dai_driver_api *)dev->api; in dai_probe()
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/Zephyr-latest/drivers/sensor/nuvoton/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c4 * SPDX-License-Identifier: Apache-2.0
14 * two independent timers (counter 1 and 2). They are used to capture a counter
18 * | Capture A
19 * | | +-----------+ TA Pin
20 * +-----------+ | +-----+-----+ | _ _ | |
21 * APB_CLK-->| Prescaler |--->|---+--->| Counter 1 |<--| _| |_| |_ |<--+
22 * +-----------+ | | +-----------+ +-----------+
24 * | Capture B
25 * LFCLK--------------------->| | +-----------+ TB Pin
26 * | +-----+-----+ | _ _ | |
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/Zephyr-latest/drivers/net/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
13 bool "Point-to-point (PPP) UART based driver"
72 bool "Capture received PPP packets"
75 This enables PPP packet capture. One needs to configure the
77 to outside system. This requires a non-PPP network connection
83 int "Capture buffer for storing full PPP packets"
93 six hex 8-bit chars separated by colons (e.g.:
105 bool "Disable PPP interface auto-start"
134 module-dep = LOG
135 module-str = Log level for ppp driver
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Dppp.c4 * SPDX-License-Identifier: Apache-2.0
36 #include <zephyr/net/capture.h>
142 switch (evt->type) { in uart_callback()
144 LOG_DBG("UART_TX_DONE: sent %zu bytes", evt->data.tx.len); in uart_callback()
161 / MSEC_PER_SEC > evt->data.tx.len * 2) { in uart_callback()
167 " (%d ms) or the UART baud rate (%u).", evt->data.tx.len, in uart_callback()
174 len = evt->data.rx.len; in uart_callback()
175 p = evt->data.rx.buf + evt->data.rx.offset; in uart_callback()
179 ret = ring_buf_put(&context->rx_ringbuf, p, len); in uart_callback()
180 if (ret < evt->data.rx.len) { in uart_callback()
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/Zephyr-latest/samples/drivers/video/capture/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/video-controls.h>
33 LOG_INF("Display device: %s", display_dev->name); in display_setup()
37 LOG_INF("- Capabilities:"); in display_setup()
57 return -ENOTSUP; in display_setup()
73 .buf_size = vbuf->bytesused, in video_display_frame()
76 .height = vbuf->bytesused / fmt.pitch, in video_display_frame()
79 display_write(display_dev, 0, vbuf->line_offset, &buf_desc, vbuf->buffer); in video_display_frame()
99 LOG_ERR("%s: video device is not ready", video_dev->name); in main()
111 LOG_INF("Video device: %s", video_dev->name); in main()
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio_nrf5_dppi_resources.h2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
15 * Capture event timer on Address reception:
29 * Capture event timer on Radio end:
46 * Capture event timer on Radio ready:
70 * Trigger Radio Rate override upon Rateboost event.
92 /* DPPI setup used for SW-based auto-switching during TIFS. */
94 /* Clear SW-switch timer on packet end:
162 * when direction finding RX and PHY is set to PHY1M. Due to that it can be shared with Radio Rate
168 /* The 2 adjacent PPI groups used for implementing SW_SWITCH_TIMER-based
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Dradio_nrf5_ppi_resources.h2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
9 /* PPI channel 20 is pre-programmed with the following fixed settings:
10 * EEP: TIMER0->EVENTS_COMPARE[0]
11 * TEP: RADIO->TASKS_TXEN
14 /* PPI channel 21 is pre-programmed with the following fixed settings:
15 * EEP: TIMER0->EVENTS_COMPARE[0]
16 * TEP: RADIO->TASKS_RXEN
20 /* PPI channel 26 is pre-programmed with the following fixed settings:
21 * EEP: RADIO->EVENTS_ADDRESS
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Dradio.c2 * Copyright (c) 2016 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/gpio/gpio.h>
84 /* These headers require the above gpiote-related variables to be declared. */
131 NRF_DT_CHECK_GPIO_CTLR_IS_SOC(FEM_NODE, pdn_gpios, "pdn-gpios");
171 NRF_GPIO_PA->DIRSET = BIT(NRF_GPIO_PA_PIN); in radio_setup()
173 NRF_GPIO_PA->OUTSET = BIT(NRF_GPIO_PA_PIN); in radio_setup()
175 NRF_GPIO_PA->OUTCLR = BIT(NRF_GPIO_PA_PIN); in radio_setup()
180 NRF_GPIO_LNA->DIRSET = BIT(NRF_GPIO_LNA_PIN); in radio_setup()
186 NRF_GPIO_PDN->DIRSET = BIT(NRF_GPIO_PDN_PIN); in radio_setup()
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Dradio_nrf5_dppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
60 * Capture event timer on Address reception:
86 * Capture event timer on Radio end:
128 * Capture event timer on Radio ready:
179 * Trigger Radio Rate override upon Rateboost event.
193 * PPI channel HAL_TRIGGER_CRYPT_DELAY_PPI is also used for HAL_TRIGGER-
197 * EEP: RADIO->EVENTS_BCMATCH
198 * TEP: CCM->TASKS_CRYPT
202 /* Configure Bit counter to trigger EVENTS_BCMATCH for CCM_TASKS_CRYPT- in hal_trigger_crypt_by_bcmatch_ppi_config()
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Dradio_nrf5_ppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
10 * SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY.
40 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
47 /* No need to configure anything for the pre-programmed channels. in hal_radio_enable_on_tick_ppi_config_and_enable()
66 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
67 (uint32_t)&(NRF_RADIO->TASKS_TXEN)); in hal_radio_enable_on_tick_ppi_config_and_enable()
70 NRF_PPI->CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX] = in hal_radio_enable_on_tick_ppi_config_and_enable()
75 (uint32_t)&(NRF_PPI->TASKS_CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX].DIS)); in hal_radio_enable_on_tick_ppi_config_and_enable()
83 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
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/Zephyr-latest/drivers/dai/intel/dmic/
Ddmic.h4 * SPDX-License-Identifier: Apache-2.0
29 #define DMIC_HW_CIC_SHIFT_MIN -8
53 #define DMIC_HW_FIR_COEF_MAX ((1 << (DMIC_HW_BITS_FIR_COEF - 1)) - 1)
54 #define DMIC_HW_FIR_COEF_Q (DMIC_HW_BITS_FIR_COEF - 1)
60 #define DMIC_HW_FIR_GAIN_MAX ((1 << (DMIC_HW_BITS_FIR_GAIN - 1)) - 1)
67 * decibels, set to -90 dB.
68 * The rate dependent ramp duration is provided by 1st order equation
72 * dy = y48 - y16; dx = 48000 - 16000;
74 * offs = round(y16 - coef/2^15 * 16000)
75 * Note: The rate dependence can be disabled with zero time_coef with
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Ddmic.c4 * SPDX-License-Identifier: Apache-2.0
33 /* Helper macro to read 64-bit data using two 32-bit data read */
40 * fairly accurately exponent for x in range -2.0 .. +2.0. The iteration
61 p = num * x; /* Q9.23 x Q3.29 -> Q12.52 */ in exp_small_fixed()
79 if (x < Q_CONVERT_FLOAT(-11.5, 27)) { in exp_fixed()
110 if (db < Q_CONVERT_FLOAT(-100.0, 24)) { in db2lin_fixed()
122 uint32_t dest = dmic->reg_base + reg; in dai_dmic_update_bits()
130 sys_write32(val, dmic->reg_base + reg); in dai_dmic_write()
136 return sys_read32(dmic->reg_base + reg); in dai_dmic_read()
143 sys_write32(sys_read32(dmic->shim_base + DMICLCTL_OFFSET) | in dai_dmic_claim_ownership()
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/Zephyr-latest/doc/services/logging/
Dcs_stm.rst3 Multi-domain logging using ARM Coresight STM
6 The Arm CoreSight SoC-400 is a comprehensive library of components for the creation of debug and
8 is integrated into a CoreSight system, designed primarily for high-bandwidth trace of
9 instrumentation embedded into software. This instrumentation is made up of memory-mapped writes to
26 capture the data (e.g. J-Trace PRO).
40 Data from ETR is handled on the device. It can be forwarded as-is to the host (e.g. using UART),
41 where a host tool is decoding the data or data can be decoded on-chip to output the data in human r…
68 * :c:func:`log_frontend_stmesp_tp` - It accepts single argument - index. Index is between
70 * :c:func:`log_frontend_stmesp_tp_d32` - It accepts two arguments - index and user data.
80 * Dictionary-based - assisted mode which is using dictionary-based logging. In this mode logging
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/Zephyr-latest/include/zephyr/sys/
Dtimeutil.h4 * SPDX-License-Identifier: Apache-2.0
12 * inverse transformations are non-standard or require access to time
44 * @brief Convert broken-down time to a POSIX epoch offset in seconds.
50 * @see http://man7.org/linux/man-pages/man3/timegm.3.html
55 * @brief Convert broken-down time to a POSIX epoch offset in seconds.
60 * the time cannot be represented then @c (time_t)-1 is returned and
63 * @see http://man7.org/linux/man-pages/man3/timegm.3.html
87 /** The nominal instance counter rate in Hz.
96 /** The nominal local counter rate in Hz.
135 * This state in conjunction with functions that manipulate it capture
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/Zephyr-latest/boards/arduino/nicla_vision/
Darduino_nicla_vision_stm32h747xx_m7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h747a(g-i)ix-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 compatible = "arduino,nicla-vision";
19 zephyr,shell-uart = &lpuart1;
20 zephyr,uart-mcumgr = &lpuart1;
21 zephyr,bt-hci = &bt_hci_uart;
24 zephyr,code-partition = &slot0_partition;
34 compatible = "usb-ulpi-phy";
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/Zephyr-latest/doc/connectivity/bluetooth/autopts/
Dautopts-win10.rst1 .. _autopts-win10:
20 Start -> Settings -> Update & Security -> Windows Update
44 Download and install `Git <https://git-scm.com/downloads>`_.
68 So to capture Bluetooth events, you have to download it separately.
79 https://www.nordicsemi.com/Software-and-tools/Development-Tools/nRF-Command-Line-Tools/Download
112 .. code-block::
116 Build the auto-pts tester app
118 .. code-block::
120 west build -p auto -b nrf52840dk/nrf52840 zephyr/tests/bluetooth/tester/
124 .. code-block::
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