Searched full:barriers (Results 1 – 18 of 18) sorted by relevance
5 - barriers13 portability.posix.barriers: {}14 portability.posix.barriers.minimal:17 portability.posix.barriers.newlib:21 portability.posix.barriers.picolibc:
8 bool "POSIX barriers"10 Select 'y' here to enable POSIX barriers.18 int "Maximum number of POSIX barriers"37 module-str = POSIX thread barriers
3 Barriers API
10 barriers/index.rst
54 * Instruction barriers to make sure the NVIC IRQ is in ZTEST()78 * Instruction barriers to make sure the NVIC IRQ is in ZTEST()
95 * Instruction barriers to make sure the NVIC IRQ is in ZTEST()
20 /* These are just compiler barriers now. Zephyr doesn't currently
189 * Instruction barriers to make sure the NVIC IRQ is in ZTEST()
239 * Instruction barriers to make sure the NVIC IRQ is in sup_fp_thread_entry()
325 * Instruction barriers to make sure the NVIC IRQ is in ZTEST()
271 * initialize barriers the standard way after deprecating in ZTEST()
97 * is saved, and must include whatever memory barriers or cache
14 * Barrier API: added architecture agnostic API for data memory barriers.1347 variables, and barriers using native Zephyr counterparts. POSIX
247 * Added data/instr. sync barriers after writing to ``SCTLR`` to disable MPU.
619 * Introduce sync barriers in ARM-specific IRQ lock/unlock functions
751 * data and instruction barriers to flush the Cortex-M4's pipeline.
419 they use the required compiler barriers.
5948 # check for memory barriers without a comment.5950 my $barriers = qr{5961 (?:$barriers)5964 (?:$barriers)|5983 "__smp memory barriers shouldn't be used outside barrier.h and asm-generic\n" . $herecurr);
