Searched full:stm32wl (Results 1 – 25 of 36) sorted by relevance
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| /Zephyr-Core-3.6.0/soc/arm/st_stm32/stm32wl/ |
| D | Kconfig.defconfig.series | 1 # STMicroelectronics STM32WL MCU line
8 source "soc/arm/st_stm32/stm32wl/Kconfig.defconfig.stm32wl*"
11 default "stm32wl"
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| D | Kconfig.series | 1 # STMicroelectronics STM32WL MCU series
18 Enable support for STM32WL MCU series
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| D | Kconfig.soc | 1 # STMicroelectronics STM32WL MCU line
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| D | soc.h | 8 * @file SoC configuration macros for the STM32WL family processors.
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| D | soc.c | 9 * @brief System/hardware module for STM32WL processor
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| /Zephyr-Core-3.6.0/boards/arm/olimex_lora_stm32wl_devkit/doc/ |
| D | olimex_lora_stm32wl_devkit.rst | 3 Olimex LoRa STM32WL DevKit
9 LoRaWAN development kit based on Olimex BB-STM32WL module using the
12 .. figure:: olimex-stm32wl-devkit.jpg
14 :alt: Olimex LoRa STM32WL DevKit
16 Olimex LoRa STM32WL DevKit (credit: OLIMEX)
23 - BB-STM32WL, 256KB Flash, 64KB RAM with external antenna
37 - `LoRa-STM32WL-DevKit Repository`_
38 - `LoRa-STM32WL-DevKit page on OLIMEX website`_
39 - `BB-STM32WL Module website`_
46 The Zephyr Olimex LoRa STM32WL Dev Kit configuration supports the following
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| /Zephyr-Core-3.6.0/boards/arm/olimex_lora_stm32wl_devkit/ |
| D | Kconfig.board | 1 # Olimex LoRa STM32WL DevKit configuration
7 bool "Olimex LoRa STM32WL DevKit"
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| D | Kconfig.defconfig | 1 # Olimex LoRa STM32WL DevKit configuration
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| D | olimex_lora_stm32wl_devkit.dts | 8 #include <olimex/bb-stm32wl.dtsi>
12 model = "Olimex LoRa STM32WL DevKit";
13 compatible = "olimex,lora-stm32wl-devkit";
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| D | olimex_lora_stm32wl_devkit.yaml | 2 name: Olimex LoRa STM32WL DevKit
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| D | board.cmake | 11 # https://github.com/OLIMEX/LoRa-STM32WL-DevKIT/blob/main/DOCUMENTS/STM32CubeIDE%20-%20How%20to%20u…
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| /Zephyr-Core-3.6.0/dts/arm/st/wl/ |
| D | stm32wl55.dtsi | 7 #include <st/wl/stm32wl.dtsi>
11 compatible = "st,stm32wl55", "st,stm32wl", "simple-bus";
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| D | stm32wle5.dtsi | 7 #include <st/wl/stm32wl.dtsi>
11 compatible = "st,stm32wle5", "st,stm32wl", "simple-bus";
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| D | stm32wl.dtsi | 66 compatible = "st,stm32wl-hse-clock";
128 compatible = "st,stm32wl-rcc";
211 /* In STM32WL, the backup registers are defined as part of the TAMP
333 compatible = "st,stm32wl-subghz-radio";
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| /Zephyr-Core-3.6.0/drivers/lora/ |
| D | Kconfig.sx12xx | 27 bool "STM32WL SUBGHZ radio driver"
33 Enable LoRa driver for STM32WL SUBGHZ radio.
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| D | sx126x_stm32wl.c | 81 * Mismatch, see STM32WL Erratasheet in sx126x_set_tx_params()
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| /Zephyr-Core-3.6.0/dts/bindings/clock/ |
| D | st,stm32wl-hse-clock.yaml | 4 description: STM32WL HSE Clock
6 compatible: "st,stm32wl-hse-clock"
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| D | st,stm32wl-rcc.yaml | 5 STM32WL Reset and Clock controller node.
8 compatible: "st,stm32wl-rcc"
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| D | st,stm32wb-pll-clock.yaml | 5 STM32WB and STM32WL PLL node.
25 - 62 MHz on STM32WL
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| /Zephyr-Core-3.6.0/dts/bindings/lora/ |
| D | st,stm32wl-subghz-radio.yaml | 4 description: STM32WL SUBGHZ Radio
6 compatible: "st,stm32wl-subghz-radio"
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| /Zephyr-Core-3.6.0/dts/bindings/spi/ |
| D | st,stm32-spi-subghz.yaml | 20 the special purpose SUBGHZSPI interface found in the STM32WL series.
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| /Zephyr-Core-3.6.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/ |
| D | wl_32_hse.overlay | 10 * It applies to the stm32wl where the hse prescaler is 1 and by-passed
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| D | wl_pll_48_hse_32.overlay | 10 * It applies to the stm32wl where the hse prescaler is 2 and by-passed
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| /Zephyr-Core-3.6.0/boards/arm/nucleo_wl55jc/doc/ |
| D | nucleo_wl55jc.rst | 9 The NUCLEO-WL55JC STM32WL Nucleo-64 board provides an affordable and flexible
10 way for users to try out new concepts and build prototypes with the STM32WL
31 - ST morpho extension pin headers for full access to all STM32WL I/Os
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| /Zephyr-Core-3.6.0/boards/arm/lora_e5_mini/doc/ |
| D | index.rst | 168 - Pyocd: For STM32WL support Pyocd needs additional target information, which
174 $ pyocd pack --install stm32wl
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