Searched full:stm32wb0 (Results 1 – 25 of 27) sorted by relevance
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| /Zephyr-latest/dts/bindings/clock/ |
| D | st,stm32wb0-rcc.yaml | 5 STM32WB0 Reset and Clock controller node for STM32WB0 devices
9 compatible: "st,stm32wb0-rcc"
30 On STM32WB0, all slow clock devices are clocked from the same
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| D | st,stm32wb0-lsi-clock.yaml | 5 STM32WB0 LSI Clock
7 The STM32WB0 MCUs are equipped with a regular RC LSI clock with a frequency of 24~40kHz.
14 compatible: "st,stm32wb0-lsi-clock"
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| /Zephyr-latest/dts/bindings/flash_controller/ |
| D | st,stm32wb0-flash-controller.yaml | 4 description: STM32WB0 series flash controller
6 compatible: "st,stm32wb0-flash-controller"
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| /Zephyr-latest/dts/bindings/interrupt-controller/ |
| D | st,stm32wb0-gpio-intc.yaml | 4 description: STM32WB0 GPIO Interrupt Controller
6 compatible: "st,stm32wb0-gpio-intc"
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| /Zephyr-latest/dts/arm/st/wb0/ |
| D | stm32wb05.dtsi | 7 #include <st/wb0/stm32wb0.dtsi>
11 compatible = "st,stm32wb05", "st,stm32wb0", "simple-bus";
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| D | stm32wb0.dtsi | 90 compatible = "st,stm32wb0-lsi-clock", "fixed-clock";
109 compatible = "st,stm32wb0-flash-controller", "st,stm32-flash-controller";
126 compatible = "st,stm32wb0-rcc";
137 compatible = "st,stm32wb0-pwr";
141 /* STM32WB0 GPIO interrupt controller
147 compatible = "st,stm32wb0-gpio-intc";
223 compatible = "st,stm32wb0-adc";
225 /* On STM32WB0, the two ADC clock domains (ANALOG / DIGITAL)
265 compatible = "st,hci-stm32wb0";
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| D | stm32wb07.dtsi | 7 #include <st/wb0/stm32wb0.dtsi>
11 compatible = "st,stm32wb07", "st,stm32wb0", "simple-bus";
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| D | stm32wb06.dtsi | 12 compatible = "st,stm32wb06", "st,stm32wb0", "simple-bus";
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| D | stm32wb09.dtsi | 16 compatible = "st,stm32wb09", "st,stm32wb0", "simple-bus";
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| /Zephyr-latest/dts/bindings/bluetooth/ |
| D | st,hci-stm32wb0.yaml | 1 description: Bluetooth HCI driver for ST STM32WB0 series
3 compatible: "st,hci-stm32wb0"
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | Kconfig.stm32 | 16 bool "GPIO Interrupt Controller Driver for STM32WB0 series"
20 Enable GPIO interrupt controller driver for STM32WB0 series
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| D | intc_gpio_stm32wb0.c | 8 * @brief Driver for STM32WB0 GPIO interrupt controller
11 * There is no "External interrupt/event controller (EXTI)" in STM32WB0 MCUs.
191 * STM32WB0 GPIO interrupt controller driver:
224 * There is no NONE trigger on STM32WB0. in stm32_gpio_intc_select_line_trigger()
258 /* Since it is not possible to disable triggers on STM32WB0, in stm32_gpio_intc_select_line_trigger()
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| /Zephyr-latest/dts/bindings/adc/ |
| D | st,stm32wb0-adc.yaml | 3 description: STM32WB0 series Analog-to-Digital Converter
5 compatible: "st,stm32wb0-adc"
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| /Zephyr-latest/drivers/adc/ |
| D | Kconfig.stm32 | 20 bool "STM32WB0 ADC driver"
25 Enable the driver implementation for the STM32WB0 series ADC
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| D | adc_stm32wb0.c | 12 * STM32WB0 ADC documentation.
86 /* The STM32WB0 has a 12-bit ADC, but the resolution can be
102 "STM32WB0: system clock frequency must be at least 8MHz to use ADC");
852 * but may be not applicable to STM32WB0 series' ADC. in adc_stm32wb0_dma_callback()
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| /Zephyr-latest/soc/st/stm32/stm32wb0x/ |
| D | Kconfig.defconfig | 1 # STMicroelectronics STM32WB0 MCU series
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| D | Kconfig.soc | 1 # STMicroelectronics STM32WB0 MCU series
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| D | soc.h | 8 * @file SoC configuration macros for the STM32WB0 family processors.
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| D | soc.c | 9 * @brief System/hardware module for STM32WB0 processor
32 * On STM32WB0 series, after RESET, the system clock frequency is 16MHz.
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| /Zephyr-latest/dts/bindings/power/ |
| D | st,stm32wb0-pwr.yaml | 4 description: STM32WB0 power controller
6 compatible: "st,stm32wb0-pwr"
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| /Zephyr-latest/drivers/bluetooth/hci/ |
| D | Kconfig | 105 bool "STM32WB0 HCI driver"
116 ST STM32WB0 HCI Bluetooth interface
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| /Zephyr-latest/drivers/clock_control/ |
| D | Kconfig.stm32 | 50 menu "STM32WB0 LSI options"
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| D | clock_stm32_ll_wb0.c | 422 * STM32WB0 because the prescaler configuration is not affected by input clock variation: in stm32_clock_control_get_subsys_rate()
592 /* The STM32WB0 prescaler division factor defines vary depending on
746 "STM32WB0 PLL requires HSE to be enabled!"); in stm32_clock_control_init()
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_stm32.c | 162 /* On STM32WB0, the PWRC PU/PD control registers should be used instead in ll_gpio_set_pin_pull()
185 /* On STM32WB0, the PWRC PU/PD control registers should be used instead in ll_gpio_get_pin_pull()
591 /* Level-sensitive interrupts are only supported on STM32WB0. */ in gpio_stm32_pin_interrupt_configure()
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| /Zephyr-latest/drivers/flash/ |
| D | flash_stm32wb0x.c | 417 * STM32WB0 flash: single bank, 2KiB pages in flash_wb0x_pages_layout()
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