/Zephyr-latest/dts/bindings/spi/ |
D | nxp,dspi.yaml | 20 pcs-sck-delay: 26 sck-pcs-delay: 56 continuous-sck: 59 continuous SCK enable. Note that the continuous SCK is only
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D | nxp,lpspi.yaml | 17 pcs-sck-delay: 23 sck-pcs-delay:
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D | nxp,imx-flexspi.yaml | 46 sck-differential-clock: 58 - 2 # Loopback from SCK pad 70 - 2 # Loopback from SCK pad
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D | nxp,s32-spi.yaml | 37 spi-sck-cs-delay: 47 spi-cs-sck-delay:
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D | nxp,flexio-spi.yaml | 23 sck-pin:
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D | cypress,psoc6-spi.yaml | 26 MISO, MOSI, SCK, and possibly various chip selects signals. We
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D | nordic,nrf-spim.yaml | 37 of SCK (leading or trailing, depending on the CPHA setting used) until
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/Zephyr-latest/tests/drivers/spi/spi_loopback/ |
D | overlay-mcux-flexio-spi.overlay | 12 <&iomuxc_gpio_ad_b1_10_flexio3_flexio10>, /* sck */ 24 <&iomuxc_gpio_ad_b1_11_flexio3_flexio11>, /* sck */ 44 sck-pin = <10>; 62 sck-pin = <11>;
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/Zephyr-latest/boards/shields/x_nucleo_idb05a1/doc/ |
D | index.rst | 20 but CS and SCK signals are not the standard Arduino SPI_CS and SPI_SCK signals. 33 Out of the box, X-NUCLEO-IDB05A1 shield expects SPI SCK to be available on 34 Arduino pin D3 instead of usual Arduino UNO R3 SPI SCK D13. 35 This is not a problem if SPI SCK from nucleo board is available on D3, 45 - SPI SCK: to use D13 instead of D3, remove R4 and add R6
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/Zephyr-latest/boards/nxp/lpcxpresso55s69/ |
D | board.c | 23 /* Set shared signal set 0 SCK, WS from Transmit I2S - Flexcomm 7 */ in lpcxpresso_55s69_board_init() 34 /* Set Receive I2S - Flexcomm 6 SCK, WS from shared signal set 0 */ in lpcxpresso_55s69_board_init() 38 /* Set Transmit I2S - Flexcomm 7 SCK, WS from shared signal set 0 */ in lpcxpresso_55s69_board_init()
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/Zephyr-latest/boards/nxp/mimxrt685_evk/ |
D | init.c | 18 /* Set shared signal set 0 SCK, WS from Transmit I2S - Flexcomm3 */ in mimxrt685_evk_init() 29 /* Set Receive I2S - Flexcomm 1 SCK, WS from shared signal set 0 */ in mimxrt685_evk_init() 33 /* Set Transmit I2S - Flexcomm 3 SCK, WS from shared signal set 0 */ in mimxrt685_evk_init()
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/Zephyr-latest/boards/madmachine/mm_feather/ |
D | mm_feather.dts | 112 pcs-sck-delay = <2>; 113 sck-pcs-delay = <2>; 119 pcs-sck-delay = <2>; 120 sck-pcs-delay = <2>;
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/Zephyr-latest/boards/madmachine/mm_swiftio/ |
D | mm_swiftio.dts | 126 pcs-sck-delay = <50>; 127 sck-pcs-delay = <50>; 133 pcs-sck-delay = <50>; 134 sck-pcs-delay = <50>;
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/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/ |
D | frdm_ke1xz_flexio_spi.overlay | 15 <FXIO_D4_PTB8>, /* sck */ 35 sck-pin = <4>;
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/Zephyr-latest/dts/bindings/gpio/ |
D | atmel-xplained-header.yaml | 24 Px7 SCK 40 6 SPI(MISO) 7 8 SPI(SCK) 7
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D | m5stack,mbus-header.yaml | 14 10 SCK 11 3.3V
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D | adafruit-feather-header.yaml | 29 6 SCK D10 17
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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/ |
D | nrf-pinctrl.h | 77 /** SPI master SCK */ 83 /** SPI slave SCK */ 95 /** I2S SCK in master mode */ 97 /** I2S SCK in slave mode */ 127 /** QSPI SCK */
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/Zephyr-latest/boards/arm/v2m_beetle/ |
D | pinmux.c | 106 gpio_0 |= (1<<13); /* Shield 0 SPI_3 SCK */ in arm_v2m_beetle_pinmux_defaults() 117 gpio_1 |= (1<<5); /* ADC SPI_1 SCK */ in arm_v2m_beetle_pinmux_defaults() 125 gpio_1 |= (1<<14); /* QSPI SCK */ in arm_v2m_beetle_pinmux_defaults()
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/Zephyr-latest/dts/bindings/mtd/ |
D | nordic,qspi-nor.yaml | 69 sck-delay: 94 sck-frequency:
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/Zephyr-latest/boards/arm/mps2/ |
D | pinmux.c | 127 | (1<<11) /* Shield 0 SPI 3 SCK */ in arm_mps2_pinmux_defaults() 140 | (1<<3) /* ADC SPI 2 SCK */ in arm_mps2_pinmux_defaults() 150 | (1<<12); /* Shield 1 SPI 4 SCK */ in arm_mps2_pinmux_defaults()
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/Zephyr-latest/boards/shields/arduino_uno_click/ |
D | arduino_uno_click.overlay | 16 <3 0 &arduino_header 19 0>, /* SCK -> D13 */ 39 <3 0 &arduino_header 19 0>, /* SCK -> D13 */
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/Zephyr-latest/samples/sensor/veaa_x_3/boards/ |
D | nucleo_h563zi.overlay | 7 /* spi1 sck conflicts with dac1 channel 3 */
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/Zephyr-latest/drivers/spi/ |
D | spi_sifive.c | 55 /* If CPOL is set, then SCK idles at logical 1 */ in spi_config() 58 /* SCK idles at logical 0 */ in spi_config() 66 * on the trailing SCK edge in spi_config() 70 /* Data is sampled on the leading SCK edge */ in spi_config()
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/Zephyr-latest/drivers/pinctrl/ |
D | pinctrl_nrf.c | 154 NRF_PSEL_SPIM(reg, SCK) = psel; in pinctrl_configure_pins() 173 NRF_PSEL_SPIS(reg, SCK) = psel; in pinctrl_configure_pins() 219 NRF_PSEL_I2S(reg, SCK) = psel; in pinctrl_configure_pins() 225 NRF_PSEL_I2S(reg, SCK) = psel; in pinctrl_configure_pins() 316 NRF_PSEL_QSPI(reg, SCK) = psel; in pinctrl_configure_pins()
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