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/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/
Dghrd_timing.sdc22 set_output_delay -clock {clk_50 } -rise -min 11 [get_ports {qspi_io[*]}]
23 set_output_delay -clock {clk_50 } -rise -min 11 [get_ports {qspi_clk}]
24 set_output_delay -clock {clk_50 } -rise -min 11 [get_ports {qspi_csn}]
25 set_input_delay -clock {clk_50 } -rise -min 10 [get_ports {qspi_io[*]}]
Dghrd_10m50da.qsf73 set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
75 set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
/Zephyr-latest/include/zephyr/math/
Dinterpolation.h40 float rise, run, slope; in linear_interpolate() local
63 rise = y_axis[idx_low + 1] - y_axis[idx_low]; in linear_interpolate()
65 slope = rise / run; in linear_interpolate()
/Zephyr-latest/dts/bindings/sensor/
Dnxp,s32-qdec.yaml34 /* LCU Out HW ID, Rise Filter, Fall Filter */
87 It contains the following for each output: hardware output id, rise filter and fall filter.
92 /* LCU Out HW ID, Rise Filter, Fall Filter */
/Zephyr-latest/dts/bindings/i2c/
Drenesas,ra-iic.yaml21 rise-time-ns:
Datmel,sam-i2c-twim.yaml132 mode. This should be adjusted to provide proper TWCK line rise time.
/Zephyr-latest/scripts/tests/twister_blackbox/test_data/tests/always_warning/dummy/src/
Dmain.c23 TC_PRINT("Create log message before rise warning\n"); in ZTEST()
/Zephyr-latest/samples/drivers/auxdisplay/boards/
Desp_wrover_kit.overlay22 enable-line-rise-delay-us = <1000>;
/Zephyr-latest/dts/bindings/clock/
Dsilabs,series2-hfrcodpll.yaml24 enum: ["fall", "rise"]
/Zephyr-latest/dts/bindings/auxdisplay/
Dhit,hd44780.yaml59 enable-line-rise-delay-ns:
/Zephyr-latest/drivers/i2c/
Di2c_sam0.c570 /* 5 is the nominal 100ns rise time from the app notes */ in i2c_sam0_set_apply_bitrate()
587 /* 5 is the nominal 100ns rise time from the app notes */ in i2c_sam0_set_apply_bitrate()
607 /* 5 is the nominal 100ns rise time from the app notes */ in i2c_sam0_set_apply_bitrate()
Di2c_ll_stm32_v2.c60 uint32_t trise; /* Rise time in ns */
/Zephyr-latest/drivers/ieee802154/
Dieee802154_rf2xx_iface.c46 /* Start TX transmission at rise edge */ in rf2xx_iface_phy_tx_start()
/Zephyr-latest/drivers/gpio/
Dgpio_sifive.c113 * both rise and high, while low will probably be set from the in gpio_sifive_irq_handler()
Dgpio_lpc11u6x.c67 volatile uint32_t rise; member
/Zephyr-latest/boards/nxp/mr_canhubk3/
Dmr_canhubk3.dts128 /* LCU Out HW ID, Rise Filter, Fall Filter */
/Zephyr-latest/drivers/sdhc/
Dsdhc_spi.c731 * Maximum VDD rise time of 35ms. in sdhc_spi_set_io()
/Zephyr-latest/drivers/usb/device/
Dusb_dc_sam_usbc.c327 * No need to abort IN transfer (rise TXINI), in usb_dc_ctrl_init()
/Zephyr-latest/doc/releases/
Drelease-notes-2.1.rst805 * :github:`18592` - (nRF51) The RSSI signal does not rise above -44 dBm
Drelease-notes-2.0.rst571 * :github:`18592` - (nRF51) The RSSI signal does not rise above -44 dBm
/Zephyr-latest/drivers/i3c/
Di3c_cdns.c477 * minimum of the clock rise and fall time plus 3ns