Searched full:r5f (Results 1 – 10 of 10) sorted by relevance
4 description: ARM Cortex-R5F CPU6 compatible: "arm,cortex-r5f"
34 The VIM aggregates device interrupts and sends them to the R5F CPU(s). The VIM35 module supports 512 interrupt inputs per R5F core. Each interrupt can be either74 | Region | Addr from A53 | MAIN R5F | Size |84 | Region | Addr from A53 | MCU R5F | Size |96 targeting the MAIN domain Cortex R5F on BeagleY-AI:103 For the MCU domain Cortex R5F on BeagleY-AI:126 The Zephyr on BeagleY-AI Cortex-R5F uses UART 1 (HAT pins 8-TX, 10-RX)
7 name: BeagleY-AI MAIN domain R5F Core 0
7 name: BeagleY-AI MCU domain R5F Core 0
8 (TI specific IP) which is compatible with R5F VIC port.
34 The VIM aggregates device interrupts and sends them to the R5F CPU(s). The VIM35 module supports 512 interrupt inputs per R5F core. Each interrupt can be either92 targeting one of the Cortex R5F on BeagleBone AI-64:
16 compatible = "arm,cortex-r5f";
102 2. Cortex-R5 and Cortex-R5F Technical Reference Manual (ARM DDI 0460C ID021511)
138 2. Cortex-R5 and Cortex-R5F Technical Reference Manual (ARM DDI 0460C ID021511)
29 dual Cortex-A53 cluster and two dual Cortex-R5F cores in the MAIN domain as
