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Searched full:qe (Results 1 – 16 of 16) sorted by relevance

/Zephyr-latest/samples/modules/thrift/hello/
Dnative-cert.pem13 qe+eWvJIEvF/bpEHcESm1v+txagk+BulyQIDAQABo1MwUTAdBgNVHQ4EFgQU7PKo
/Zephyr-latest/samples/drivers/espi/src/
Dmain.c186 * 3. Read STATUS2 and check QE bit
187 * 4. If QE bit is not set
189 * Set volatile QE bit
191 * Read STATUS2 and check QE
192 * Returns 0 if QE was already set or this routine successfully set volatile
193 * QE. Returns < 0 on SPI driver error or unexpected BUSY or STATUS values.
279 * If QE not set then write the volatile QE bit. in spi_saf_init()
281 * will act as IO2/IO3. We will write the volatile QE bit for less in spi_saf_init()
322 LOG_ERR("Write SPI STATUS2 QE=1 spi_transceive" in spi_saf_init()
363 /* Read STATUS2 to make sure QE is set */ in spi_saf_init()
[all …]
/Zephyr-latest/drivers/flash/
Dflash_ifx_cat1_qspi.c127 /* Specifies the command to read the QE-containing status register. */
133 /* Specifies the command to write into the QE-containing status register. */
164 /* QE mask for the status registers */
Dflash_stm32_qspi.c1089 /* no QE bit, device detects reads based on opcode */ in qspi_program_quad_io()
1118 /* exit early if QE bit is already set */ in qspi_program_quad_io()
1140 /* validate that QE bit is set */ in qspi_program_quad_io()
1255 /* try to decode QE requirement type */ in spi_nor_process_bfp()
1259 LOG_WRN("Unable to decode QE requirement [DW15]: %d", rc); in spi_nor_process_bfp()
1265 LOG_INF("QE requirement mode: %x", data->qer_type); in spi_nor_process_bfp()
1267 /* enable QE */ in spi_nor_process_bfp()
Dflash_mcux_flexspi_nor.c107 /* Standard 1S-1S-1S flash write command, can be switched to 1S-1S-4S when QE is set */
631 /* Wait for QE bit to complete programming */ in flash_flexspi_nor_quad_enable()
1031 /* Device uses bit 1 of status reg 2 for QE */ in flash_flexspi_nor_check_jedec()
1062 /* Device uses bit 1 of status reg 2 for QE */ in flash_flexspi_nor_check_jedec()
1093 /* Device uses bit 6 of status reg 1 for QE */ in flash_flexspi_nor_check_jedec()
1130 /* Device has no QE bit, 1-4-4 and 1-1-4 is always enabled */ in flash_flexspi_nor_check_jedec()
Djesd216.h436 /* DW15 Quad Enable Requirements specifies status register QE bits.
442 /* No QE status required for 1-1-4 or 1-4-4 mode */
Dnrf_qspi_nor.c637 /* Set QE to match transfer mode. If not using quad in configure_chip()
638 * it's OK to leave QE set, but doing so prevents use in configure_chip()
675 LOG_DBG("RDSR %02x QE %d need %d: %s", sr, qe_state, qe_value, in configure_chip()
685 LOG_ERR("QE %s failed: %d", qe_value ? "set" : "clear", in configure_chip()
Dflash_stm32_xspi.c1695 /* no QE bit, device detects reads based on opcode */ in stm32_xspi_enable_qe()
1724 /* exit early if QE bit is already set */ in stm32_xspi_enable_qe()
1746 /* validate that QE bit is set */ in stm32_xspi_enable_qe()
1907 LOG_WRN("Unable to decode QE requirement [DW15]"); in spi_nor_process_bfp()
1913 LOG_DBG("QE requirement mode: %x", data->qer_type); in spi_nor_process_bfp()
Dflash_stm32_ospi.c1858 /* no QE bit, device detects reads based on opcode */ in stm32_ospi_enable_qe()
1887 /* exit early if QE bit is already set */ in stm32_ospi_enable_qe()
1909 /* validate that QE bit is set */ in stm32_ospi_enable_qe()
2070 LOG_WRN("Unable to decode QE requirement [DW15]"); in spi_nor_process_bfp()
2076 LOG_DBG("QE requirement mode: %x", data->qer_type); in spi_nor_process_bfp()
Dflash_npcx_fiu_nor.c563 /* Set QE bit in status register */ in flash_npcx_nor_init()
Dflash_andes_qspi.c850 /* Set status register QE bit. */ in flash_andes_qspi_init()
Dflash_nxp_s32_qspi_nor.c509 /* no QE bit, device detects reads based on opcode */ in nxp_s32_qspi_set_quad_mode()
/Zephyr-latest/dts/bindings/mtd/
Djedec,jesd216.yaml52 instruction. Use S1B6 if QE is bit 6 of the first status register
/Zephyr-latest/modules/nrf_wifi/bus/
Dqspi_if.c748 /* Set QE to match transfer mode. If not using quad in qspi_nrfx_configure()
749 * it's OK to leave QE set, but doing so prevents use in qspi_nrfx_configure()
768 LOG_DBG("RDSR %02x QE %d need %d: %s", sr, qe_state, qe_value, in qspi_nrfx_configure()
796 LOG_ERR("QE %s failed: %d", qe_value ? "set" : "clear", ret); in qspi_nrfx_configure()
/Zephyr-latest/tests/boards/mec15xxevb_assy6853/qspi/src/
Dmain.c388 /* set register2 QE=1 to enable quad mode */ in test_spi_quad_write()
426 "Write spi status2 QE=1 spi_transceive failure: " in test_spi_quad_write()
/Zephyr-latest/tests/boards/mec172xevb_assy6906/qspi/src/
Dmain.c488 /* set register2 QE=1 to enable quad mode. We write the volatile STATUS2 register in test_spi_quad_write()
498 zassert_true(ret == 0, "Write spi status2 QE=1 spi_transceive failure: " in test_spi_quad_write()