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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio_nrf5_ppi_resources.h9 /* PPI channel 20 is pre-programmed with the following fixed settings:
14 /* PPI channel 21 is pre-programmed with the following fixed settings:
20 /* PPI channel 26 is pre-programmed with the following fixed settings:
26 /* PPI channel 22 is pre-programmed with the following fixed settings:
32 /* PPI channel 27 is pre-programmed with the following fixed settings:
61 * PPI channel 25 is pre-programmed with the following fixed settings:
70 * PPI channel 23 is pre-programmed with the following fixed settings:
93 /* PPI setup used for SW-based auto-switching during TIFS. */
100 * Note: this PPI is not needed if we use a single TIMER instance in radio.c
110 * Note: in nRF52X this PPI channel is forked for both capturing and clearing
[all …]
Dradio_nrf5_dppi.h145 * Note: we do not need an additional PPI, since we have already set up
146 * a PPI to publish RADIO ADDRESS event.
193 * PPI channel HAL_TRIGGER_CRYPT_DELAY_PPI is also used for HAL_TRIGGER-
195 * Make sure the same PPI is not configured for both events at once.
233 * an additional PPI, since we have already set up a PPI to publish RADIO END
234 * event. In other case separate PPI is used because packet end is marked by
250 /* The 2 adjacent PPI groups used for implementing SW_SWITCH_TIMER-based
284 * to a PPI GROUP TASK DISABLE task (PPI group with index <index>).
285 * 2 adjacent PPIs (14 & 15) and 2 adjacent PPI groups are used for this wiring;
303 /* Enable the SW Switch PPI Group on RADIO END Event.
[all …]
Dradio_nrf5_dppi_resources.h56 * Note: we do not need an additional PPI, since we have already set up
57 * a PPI to publish RADIO ADDRESS event.
98 * an additional PPI, since we have already set up a PPI to publish RADIO END
99 * event. In other case separate PPI is used because packet end is marked by
109 * to a PPI GROUP TASK DISABLE task (PPI group with index <index>).
110 * 2 adjacent PPIs (14 & 15) and 2 adjacent PPI groups are used for this wiring;
115 /* Enable the SW Switch PPI Group on RADIO END Event.
117 * Note: we do not need an additional PPI, since we have already set up
118 * a PPI to publish RADIO END event.
127 * We use the same PPI as for disabling the SW Switch PPI groups,
[all …]
Dradio_nrf5_ppi.h40 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
107 * Use the pre-programmed PPI channel if possible (if TIMER0 is used as the
135 * Use the pre-programmed PPI channel if possible (if TIMER0 is used as the
163 * Use the pre-programmed PPI channel if possible (if TIMER0 is used as the
217 * PPI channel 25 is pre-programmed with the following fixed settings:
231 /* No need to disable anything as ppi channel will be disabled in a in hal_trigger_crypt_ppi_disable()
232 * separate disable ppi call by the caller of this function. in hal_trigger_crypt_ppi_disable()
241 * PPI channel HAL_TRIGGER_CRYPT_DELAY_PPI is also used for HAL_TRIGGER-
243 * Make sure the same PPI is not configured for both events at once.
266 * PPI channel 23 is pre-programmed with the following fixed settings:
[all …]
Dradio_nrf5.h66 /* Define to reset PPI registration.
67 * This has to come before the ppi/dppi includes below.
71 /* This has to come before the ppi/dppi includes below. */
86 #error "PPI or DPPI abstractions missing."
106 /* This is delay between PPI task START and timer actual start counting. */
109 #else /* For simulated targets there is no delay for the PPI task -> TIMER start */
/Zephyr-latest/drivers/counter/
DKconfig.nrfx12 # Internal flag which detects if PPI wrap feature is enabled for any instance
14 def_bool $(dt_nodelabel_bool_prop,rtc0,ppi-wrap) || \
15 $(dt_nodelabel_bool_prop,rtc1,ppi-wrap) || \
16 $(dt_nodelabel_bool_prop,rtc2,ppi-wrap)
/Zephyr-latest/soc/nordic/nrf53/
Dsync_rtc.c30 uint8_t ppi; member
44 * using just IPC, PPI and RTC.
47 * APP: setup PPI connection from IPC_RECEIVE to RTC CAPTURE, enable interrupt
49 * NET: setup RTC CC for arbitrary offset from now, setup PPI from RTC_COMPARE to IPC_SEND
58 * NET: setup PPI from IPC_RECEIVE to RTC CAPTURE
80 nrfx_gppi_task_endpoint_setup(channels.ch.ppi, task_addr); in ppi_ipc_to_rtc()
81 nrf_ipc_publish_set(NRF_IPC, ipc_evt, channels.ch.ppi); in ppi_ipc_to_rtc()
83 nrfx_gppi_task_endpoint_clear(channels.ch.ppi, task_addr); in ppi_ipc_to_rtc()
99 nrf_ipc_subscribe_set(NRF_IPC, ipc_task, channels.ch.ppi); in ppi_rtc_to_ipc()
100 nrfx_gppi_event_endpoint_setup(channels.ch.ppi, evt_addr); in ppi_rtc_to_ipc()
[all …]
/Zephyr-latest/dts/bindings/rtc/
Dnordic,nrf-rtc.yaml23 # through PPI channel which ensures precise timing. If disabled then
26 ppi-wrap:
28 description: Enable wrapping with PPI
/Zephyr-latest/dts/bindings/misc/
Dnordic,nrf-ppi.yaml4 description: Nordic nRF family PPI (Programmable Peripheral Interconnect)
6 compatible: "nordic,nrf-ppi"
/Zephyr-latest/tests/drivers/counter/counter_basic_api/boards/
Dnrf52dk_nrf52832.overlay28 ppi-wrap;
33 ppi-wrap;
Dnrf51dk_nrf51822.overlay18 ppi-wrap;
Dnrf52840dk_nrf52811.overlay18 ppi-wrap;
Dnrf9160dk_nrf9160.overlay18 ppi-wrap;
Dnrf52dk_nrf52810.overlay18 ppi-wrap;
Dnrf52833dk_nrf52833.overlay32 ppi-wrap;
Dnrf52840dk_nrf52840.overlay28 ppi-wrap;
Dnrf54h20dk_nrf54h20_common.dtsi55 ppi-wrap;
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue/
Dbt_ctlr_used_resources.h10 /* NOTE: BT_CTLR_USED_PPI_CHANNELS is defined based on PPI defines being
11 * defined in the below PPI/DPPI resources header file. Take care to
21 /* Mask with all (D)PPI channels used by the bluetooth controller. */
101 /* Mask with all (D)PPI groups used by the bluetooth controller. */
/Zephyr-latest/drivers/pwm/
DKconfig.nrf_sw16 GPIOTE channel and two PPI/DPPI channels and per pin.
20 PPI/DPPI channels per pin.
/Zephyr-latest/dts/bindings/display/
Dnordic,nrf-led-matrix.yaml63 GPIOs. If not provided, GPIOTE and PPI channels are allocated and
76 In case GPIOTE and PPI channels are used for generating the pixel pulse
79 If GPIOTE and PPI channels are used, the upper limit for the value is
/Zephyr-latest/samples/boards/nordic/nrfx/
DREADME.rst10 GPIOTE and DPPI/PPI are used as examples of nrfx drivers.
14 how the DPPI/PPI subsystem can be used to connect tasks and events of
Dsample.yaml17 - "\\(D\\)PPI configured, leaving main()"
/Zephyr-latest/drivers/serial/
DKconfig.nrfx_uart_instance30 Feature uses a PPI channel.
64 Hardware RX byte counting requires timer instance and one PPI channel.
67 reliable byte counting without additional HW resources (TIMER and (D)PPI).
/Zephyr-latest/drivers/display/
DKconfig.nrf_led_matrix18 devicetree, one PWM instance or one or more GPIOTE and PPI channels
/Zephyr-latest/drivers/interrupt_controller/
Dintc_gic.c230 * Disable all interrupts. Leave the PPI and SGIs alone in gic_dist_init()
253 * Deal with the banked PPI and SGI interrupts - disable all in gic_cpu_init()
254 * PPI interrupts, ensure all SGI interrupts are enabled. in gic_cpu_init()
263 * Set priority on PPI and SGI interrupts in gic_cpu_init()

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