M7 (full) in projects: hal_nxp-latest - OpenGrok search results

Searched full:m7 (Results 1 – 25 of 378) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
D	fsl_soc_src.h	113 kSRC_M7LockUpReset = 8U, /!< M7 core lockup triggers the global system reset. / 115 kSRC_M7RequestReset = 12U, /!< M7 core request triggers the global system reset. / 127 …kSRC_M7CoreIppResetFlag = 1UL << 0UL, /!< The M7 Core reset is the result of ipp_reset_b p… 128 …kSRC_M7CoreM7RequestResetFlag = 1UL << 1UL, /!< The M7 Core reset is the result of M7 core reset… 129 …kSRC_M7CoreM7LockUpResetFlag = 1UL << 2UL, /!< The M7 Core reset is the result of M7 core lock … 130 …kSRC_M7CoreCSUResetFlag = 1UL << 3UL, /!< The M7 Core reset is the result of csu_reset_b i… 131 kSRC_M7CoreIppUserResetFlag = 1UL << 4UL, /!< The M7 Core reset is the result of 133 …kSRC_M7CoreWdogResetFlag = 1UL << 5UL, /!< The M7 Core reset is the result of the watchdog … 134 …kSRC_M7CoreJtagResetFlag = 1UL << 6UL, /!< The M7 Core reset is the result of HIGH-Z reset … 135 …kSRC_M7CoreJtagSWResetFlag = 1UL << 7UL, /!< The M7 Core reset is the result of software rese… [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/cache/armv7-m7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/cm7/
D	fsl_cache.h	123 * @name Control for cortex-m7 L1 cache 128 * @brief Enables cortex-m7 L1 instruction cache. 137 * @brief Disables cortex-m7 L1 instruction cache. 149 * @brief Invalidate cortex-m7 L1 instruction cache. 158 * @brief Invalidate cortex-m7 L1 instruction cache by range. 170 * @brief Enables cortex-m7 L1 data cache. 179 * @brief Disables cortex-m7 L1 data cache. 191 * @brief Invalidates cortex-m7 L1 data cache. 200 * @brief Cleans cortex-m7 L1 data cache. 209 * @brief Cleans and Invalidates cortex-m7 L1 data cache. [all …]
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
D	S32K344_COMMON.h	156 HardFault_IRQn = -13, /*< Cortex-M7 SV Hard Fault Interrupt / 157 MemoryManagement_IRQn = -12, /*< Cortex-M7 Memory Management Interrupt / 158 BusFault_IRQn = -11, /*< Cortex-M7 Bus Fault Interrupt / 159 UsageFault_IRQn = -10, /*< Cortex-M7 Usage Fault Interrupt / 160 SVCall_IRQn = -5, /*< Cortex-M7 SV Call Interrupt / 161 DebugMonitor_IRQn = -4, /*< Cortex-M7 Debug Monitor Interrupt / 162 PendSV_IRQn = -2, /*< Cortex-M7 Pend SV Interrupt / 163 SysTick_IRQn = -1, /*< Cortex-M7 System Tick Interrupt / 320 -- Cortex M7 Core Configuration 324 * @addtogroup Cortex_Core_Configuration Cortex M7 Core Configuration
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mp/
D	clock_config.c	84 …ing steps just show how to configure the PLL clock sources using the clock driver on M7 core side . in BOARD_BootClockRUN() 87 …* Therefore, there is no need to configure the system PLL again on M7 side, otherwise it would hav… in BOARD_BootClockRUN() 94 /* switch AXI M7 root to 24M first in order to configure the SYSTEM PLL2. / in BOARD_BootClockRUN() 103 CLOCK_SetRootMux(kCLOCK_RootM7, kCLOCK_M7RootmuxSysPll1); / switch cortex-m7 to SYSTEM PLL1 / in BOARD_BootClockRUN() 121 …/ The purpose to enable the following modules clock is to make sure the M7 core could work normal… in BOARD_BootClockRUN() 131 /* Power up the audiomix domain by M7 core./ in BOARD_BootClockRUN() 132 …_MAPPING \|= 1U << GPC_PGC_CPU_M7_MAPPING_AUDIOMIX_DOMAIN_SHIFT; / Map the audiomix domain to M7 */ in BOARD_BootClockRUN()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mn/
D	clock_config.c	75 …ing steps just show how to configure the PLL clock sources using the clock driver on M7 core side . in BOARD_BootClockRUN() 78 …* Therefore, there is no need to configure the system PLL again on M7 side, otherwise it would hav… in BOARD_BootClockRUN() 85 /* switch AXI M7 root to 24M first in order to configure the SYSTEM PLL3. / in BOARD_BootClockRUN() 97 …CLOCK_SetRootDivider(kCLOCK_RootM7, 1U, 1U); / Set M7 root clock freq to 600M / 1 = … in BOARD_BootClockRUN() 98 CLOCK_SetRootMux(kCLOCK_RootM7, kCLOCK_M7RootmuxSysPll3); /* switch cortex-m7 to SYSTEM PLL3 / in BOARD_BootClockRUN() 112 …/ The purpose to enable the following modules clock is to make sure the M7 core could work normal… in BOARD_BootClockRUN()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/
D	README.md	`19 The cmake command is requiring several arguments. For instance, to build for m7 with AC6 compiler: 23 -DARM_CPU="cortex-m7" \ 60 For instance, if you built for m7, you could just do: 62 FVP_MPS2_Cortex-M7.exe -a arm_variance_example 102 -DARM_CPU="cortex-m7" \`
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/drivers/
D	fsl_clock.h	217 …kCLOCK_AudioPll1Clk, kCLOCK_VideoPll1Clk, kCLOCK_SysPll3Clk}, /* Cortex-M7 Clock Root. / … 356 kCLOCK_CoreM7Clk, /!< ARM M7 Core clock / 496 …(uintptr_t)CCM_BASE + offsetof(CCM_Type, ROOT[1].TARGET_ROOT), /!< ARM Cortex-M7 Clock control na… 559 kCLOCK_M7ClkRoot = 0, /!< ARM Cortex-M7 Clock control name./ 608 /! @brief Root clock select enumeration for ARM Cortex-M7 core. / 611 kCLOCK_M7RootmuxOsc24M = 0U, /!< ARM Cortex-M7 Clock from OSC 24M./ 612 kCLOCK_M7RootmuxSysPll2Div5 = 1U, /!< ARM Cortex-M7 Clock from SYSTEM PLL2 divided by 5./ 613 kCLOCK_M7RootmuxSysPll2Div4 = 2U, /!< ARM Cortex-M7 Clock from SYSTEM PLL2 divided by 4./ 614 kCLOCK_M7RootmuxSysPll1Div3 = 3U, /!< ARM Cortex-M7 Clock from SYSTEM PLL1 divided by 3./ 615 kCLOCK_M7RootmuxSysPll1 = 4U, /!< ARM Cortex-M7 Clock from SYSTEM PLL1./ [all …]

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Project(s)	No entries found Zephyr Zephyr-2.7.6 Zephyr-3.6.0 Zephyr-3.7.1 Zephyr-4.0.0 Zephyr-4.1.0 Zephyr-latest acpica acpica-latest babblesim_base babblesim_base-latest babblesim_ext_2G4_channel_NtNcable babblesim_ext_2G4_channel_NtNcable-latest babblesim_ext_2G4_channel_multiatt babblesim_ext_2G4_channel_multiatt-latest babblesim_ext_2G4_device_WLAN_actmod babblesim_ext_2G4_device_WLAN_actmod-latest babblesim_ext_2G4_device_burst_interferer babblesim_ext_2G4_device_burst_interferer-latest babblesim_ext_2G4_device_playback babblesim_ext_2G4_device_playback-latest babblesim_ext_2G4_libPhyComv1 babblesim_ext_2G4_libPhyComv1-latest babblesim_ext_2G4_modem_BLE_simple babblesim_ext_2G4_modem_BLE_simple-latest babblesim_ext_2G4_modem_magic babblesim_ext_2G4_modem_magic-latest babblesim_ext_2G4_phy_v1 babblesim_ext_2G4_phy_v1-latest babblesim_ext_libCryptov1 babblesim_ext_libCryptov1-latest bsim bsim-latest cmsis cmsis-latest cmsis-dsp cmsis-dsp-latest cmsis-nn cmsis-nn-latest cmsis_6 cmsis_6-latest edtt edtt-latest fatfs fatfs-latest hal_adi hal_adi-latest hal_altera hal_altera-latest hal_ambiq hal_ambiq-latest hal_atmel hal_atmel-latest hal_espressif hal_espressif-latest hal_ethos_u hal_ethos_u-latest hal_gigadevice hal_gigadevice-latest hal_infineon hal_infineon-latest hal_intel hal_intel-latest hal_microchip hal_microchip-latest hal_nordic hal_nordic-latest hal_nuvoton hal_nuvoton-latest hal_nxp hal_nxp-latest hal_openisa hal_openisa-latest hal_quicklogic hal_quicklogic-latest hal_renesas hal_renesas-latest hal_rpi_pico hal_rpi_pico-latest hal_silabs hal_silabs-latest hal_st hal_st-latest hal_stm32 hal_stm32-latest hal_tdk hal_tdk-latest hal_telink hal_telink-latest hal_ti hal_ti-latest hal_wch hal_wch-latest hal_wurthelektronik hal_wurthelektronik-latest hal_xtensa hal_xtensa-latest hostap hostap-latest liblc3 liblc3-latest libmctp libmctp-latest libmetal libmetal-latest littlefs littlefs-latest loramac-node loramac-node-latest lvgl lvgl-latest mbedtls mbedtls-latest mcuboot mcuboot-latest mipi-sys-t mipi-sys-t-latest net-tools net-tools-latest nrf_hw_models nrf_hw_models-latest nrf_wifi nrf_wifi-latest open-amp open-amp-latest openthread openthread-latest percepio percepio-latest picolibc picolibc-latest segger segger-latest tinycrypt tinycrypt-latest trusted-firmware-a trusted-firmware-a-latest trusted-firmware-m trusted-firmware-m-latest uoscore-uedhoc uoscore-uedhoc-latest zcbor zcbor-latest

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