Searched full:m4 (Results 1 – 25 of 407) sorted by relevance
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| /Zephyr-latest/soc/nxp/imx/imx6sx/ |
| D | soc.c | 18 /* Move M4 core to the configured RDC domain */ in SOC_RdcInit()
21 /* Set access to WDOG3 for M4 core */ in SOC_RdcInit()
27 /* Set access to UART_1 for M4 core */ in SOC_RdcInit()
31 /* Set access to UART_2 for M4 core */ in SOC_RdcInit()
35 /* Set access to UART_3 for M4 core */ in SOC_RdcInit()
39 /* Set access to UART_4 for M4 core */ in SOC_RdcInit()
43 /* Set access to UART_5 for M4 core */ in SOC_RdcInit()
47 /* Set access to UART_6 for M4 core */ in SOC_RdcInit()
51 /* Set access to GPIO_1 for M4 core */ in SOC_RdcInit()
55 /* Set access to GPIO_2 for M4 core */ in SOC_RdcInit()
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| /Zephyr-latest/tests/drivers/w1/w1_api/ |
| D | testcase.yaml | 43 - apard32690/max32690/m4
44 - max32655evkit/max32655/m4
47 - max32680evkit/max32680/m4
48 - max32690evkit/max32690/m4
49 - max78002evkit/max78002/m4
51 - apard32690/max32690/m4
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| /Zephyr-latest/samples/drivers/ipm/ipm_imx/ |
| D | sample.yaml | 10 - udoo_neo_full/mcimx6x/m4
11 - colibri_imx7d/mcimx7d/m4
12 - warp7/mcimx7d/m4
14 - udoo_neo_full/mcimx6x/m4
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| /Zephyr-latest/soc/adi/max32/ |
| D | soc.yml | 9 - name: m4
19 - name: m4
22 - name: m4
25 - name: m4
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| /Zephyr-latest/boards/udoo/udoo_neo_full/doc/ |
| D | index.rst | 8 composed of one ARM |reg| Cortex-A9 core running up to 1 GHz and one Cortex-M4
10 Zephyr was ported to run on the Cortex-M4 core only. In a future release, it
16 - MCIMX6X MCU with a single Cortex-A9 (1 GHz) core and single Cortex-M4 (227 MHz) core
65 - 22x GPIO (M4)
152 PLL settings for M4 core are set via code running on the A9 core.
157 The MCIMX6X SoC has six UARTs. UART5 is configured for the M4 core and the
163 The M4 core does not have a flash memory and is not provided a clock
165 The A9 core is responsible to load the M4 binary application into the RAM,
166 put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get
167 the M4 out of reset. The A9 can perform these steps at the bootloader level
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| /Zephyr-latest/soc/infineon/cat1a/ |
| D | Kconfig | 32 bool "Dual-core support [activate Cortex-M4]"
35 Cortex-M0 CPU should boot Cortex-M4
43 dual-core MCU. The image is responsible for booting the Cortex-M4 on the device.
49 dual-core MCU.The image is provided as C array ready to be compiled as part of the Cortex-M4
50 application. The Cortex-M0+ application code is placed to internal flash by the Cortex-M4
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| /Zephyr-latest/tests/drivers/i2c/i2c_target_api/ |
| D | testcase.yaml | 49 - max32655evkit/max32655/m4
55 - max32680evkit/max32680/m4
56 - max32690evkit/max32690/m4
58 - max32690evkit/max32690/m4
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| /Zephyr-latest/soc/nxp/lpc/lpc54xxx/gcc/ |
| D | startup_LPC54114_cm4.S | 32 /* Both the M0+ and M4 core come via this shared startup code,
33 * but the M0+ and M4 core have different vector tables.
47 /* Determine which core (M0+ or M4) this code is running on */
48 /* r2 = (((*cpu_id) >> 4) & 0xFFF); (M4 core == 0xC24) */
56 cmp r3, r2 /* Core ID matches M4 identifier */
60 /* Determine if M4 core is the master or slave */
61 /* r3 = ((*cpu_ctrl) & 1); (0 == m0+, 1 == M4) */
66 ands r3, r3, r5 /* r3 = (Bit 0: 1 = M4 is master, 0 = M4 is slave) */
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| /Zephyr-latest/soc/nxp/imx/ |
| D | soc.yml | 29 - name: m4
35 - name: m4
51 - name: m4
57 - name: m4
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| /Zephyr-latest/soc/ti/k3/am6x/ |
| D | CMakeLists.txt | 11 zephyr_sources(m4/soc.c)
13 zephyr_include_directories(m4)
20 set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/m4/linker.ld CACHE INTERNAL "")
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| /Zephyr-latest/boards/toradex/colibri_imx7d/doc/ |
| D | index.rst | 7 core and Single Cortex M4 core.
8 Zephyr was ported to run on the M4 core. In a later release, it will also
14 - i.MX7 Single/Dual Cortex A7 (800MHz/1.0GHz) core and Single Cortex M4 (200MHz) core
19 - RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
65 supports the following hardware features on the Cortex M4 Core:
117 The M4 Core is configured to run at a 200 MHz clock speed.
128 The Colibri iMX7D doesn't have QSPI flash for the M4 and it needs to be started by
129 the A7 core. The A7 core is responsible to load the M4 binary application into the
130 RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get
131 the M4 out of reset.
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| /Zephyr-latest/boards/phytec/phyboard_electra/ |
| D | phyboard_electra_am6442_m4.yaml | 1 identifier: phyboard_electra/am6442/m4
2 name: PHYTEC phyBOARD-Electra AM64x M4
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| /Zephyr-latest/boards/phytec/phyboard_lyra/ |
| D | phyboard_lyra_am6234_m4.yaml | 1 identifier: phyboard_lyra/am6234/m4
2 name: PHYTEC phyBOARD-Lyra AM62x M4
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| D | Kconfig.phyboard_lyra | 1 # PHYTEC phyBOARD-Lyra AM62x M4/A53
12 PHYTEC phyBOARD-Lyra AM62x M4/A53
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| /Zephyr-latest/boards/ti/sk_am62/ |
| D | sk_am62_am6234_m4.yaml | 1 identifier: sk_am62/am6234/m4
2 name: TI AM62X M4 Starter Kit (SK)
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| /Zephyr-latest/dts/bindings/cpu/ |
| D | arm,cortex-m4.yaml | 4 description: ARM Cortex-M4 CPU
6 compatible: "arm,cortex-m4"
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| /Zephyr-latest/soc/ti/k3/ |
| D | soc.yml | 8 - name: m4
12 - name: m4
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| /Zephyr-latest/boards/st/stm32h745i_disco/ |
| D | stm32h745i_disco_stm32h745xx_m4.yaml | 1 identifier: stm32h745i_disco/stm32h745xx/m4
2 name: STM32H745XI Discovery (M4)
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| /Zephyr-latest/boards/adi/max32690fthr/ |
| D | max32690fthr_max32690_m4.yaml | 1 identifier: max32690fthr/max32690/m4
2 name: max32690fthr m4
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| /Zephyr-latest/boards/arduino/portenta_h7/ |
| D | arduino_portenta_h7_stm32h747xx_m4.yaml | 1 identifier: arduino_portenta_h7/stm32h747xx/m4
2 name: Arduino Portenta H7 (M4)
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| /Zephyr-latest/boards/arduino/nicla_vision/ |
| D | arduino_nicla_vision_stm32h747xx_m4.yaml | 1 identifier: arduino_nicla_vision/stm32h747xx/m4
2 name: Arduino Nicla Vision (M4)
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| /Zephyr-latest/boards/st/stm32h747i_disco/ |
| D | stm32h747i_disco_stm32h747xx_m4.yaml | 1 identifier: stm32h747i_disco/stm32h747xx/m4
2 name: ST STM32H747I Discovery (M4)
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| /Zephyr-latest/boards/arduino/giga_r1/ |
| D | arduino_giga_r1_stm32h747xx_m4.yaml | 1 identifier: arduino_giga_r1/stm32h747xx/m4
2 name: Arduino GIGA R1 WiFi (M4)
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| /Zephyr-latest/boards/st/nucleo_h755zi_q/ |
| D | nucleo_h755zi_q_stm32h755xx_m4.yaml | 1 identifier: nucleo_h755zi_q/stm32h755xx/m4
2 name: ST Nucleo H755ZI-Q (M4)
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| /Zephyr-latest/boards/adi/apard32690/ |
| D | apard32690_max32690_m4.yaml | 1 identifier: apard32690/max32690/m4
2 name: apard32690 m4
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