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/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_vexriscv_litex.c63 uint32_t pending, mask, irqs; in vexriscv_litex_irq_handler() local
67 irqs = pending & mask; in vexriscv_litex_irq_handler()
70 if (irqs & (1 << TIMER0_IRQ)) { in vexriscv_litex_irq_handler()
77 if (irqs & (1 << UART0_IRQ)) { in vexriscv_litex_irq_handler()
84 if (irqs & (1 << ETH0_IRQ)) { in vexriscv_litex_irq_handler()
91 if (irqs & (1 << I2S_RX_IRQ)) { in vexriscv_litex_irq_handler()
95 if (irqs & (1 << I2S_TX_IRQ)) { in vexriscv_litex_irq_handler()
101 if (irqs & (1 << GPIO_IRQ)) { in vexriscv_litex_irq_handler()
Dintc_system_apic.c34 * The Galileo board virtualizes IRQs as follows:
36 * - The first z_ioapic_num_rtes() IRQs are provided by the IOAPIC so the
37 * IOAPIC is programmed for these IRQs
38 * - The remaining IRQs are provided by the LOAPIC and hence the LOAPIC is
Dintc_arcv2_irq_unit.c118 * - disable private IRQs: they will be enabled with irq_enable before usage in arc_core_private_intc_init()
119 * - enable shared (IDU) IRQs: their enabling / disabling is controlled via IDU, so we in arc_core_private_intc_init()
122 * - disable all IRQs: they will be enabled with irq_enable before usage in arc_core_private_intc_init()
/Zephyr-Core-3.5.0/scripts/native_simulator/native/src/include/
Dnsi_cpu0_interrupts.h14 * This interrupt will awake the CPU if IRQs are not locked,
19 * This interrupt will awake the CPU even if IRQs are locked,
/Zephyr-Core-3.5.0/tests/kernel/interrupt/src/
Dnested_irq.c25 * This test uses two IRQ lines selected within the range of available IRQs on
26 * the target SoC. These IRQs are platform and interrupt controller-specific,
34 * For Cortex-M NVIC, unused and available IRQs are automatically detected when
38 * SVCall exception and Zero-Latency IRQs (see `_EXCEPTION_RESERVED_PRIO`).
140 /* Connect and enable test IRQs */ in ZTEST()
/Zephyr-Core-3.5.0/drivers/ieee802154/
DKconfig.nrf533 The driver may manage radio IRQs by itself, or use an external
34 radio IRQ provider. When radio IRQs are managed by an external
35 provider, the driver shall not configure radio IRQs.
/Zephyr-Core-3.5.0/boards/posix/native_posix/
Dboard_soc.h31 * This interrupt will awake the CPU if IRQs are not locked,
36 * This interrupt will awake the CPU even if IRQs are locked,
/Zephyr-Core-3.5.0/tests/arch/arm/arm_interrupt/src/
Darm_interrupt.c387 /* Confirm IRQs are not locked */ in z_impl_test_arm_user_interrupt_syscall()
398 /* Lock IRQs in supervisor mode */ in z_impl_test_arm_user_interrupt_syscall()
401 /* Verify that IRQs were not already locked */ in z_impl_test_arm_user_interrupt_syscall()
402 zassert_false(key, "IRQs locked in system call\n"); in z_impl_test_arm_user_interrupt_syscall()
405 /* Confirm IRQs are still locked */ in z_impl_test_arm_user_interrupt_syscall()
422 /* Attempt to lock IRQs in user mode */ in ZTEST_USER()
429 zassert_false(lock, "IRQs shown locked in user mode\n"); in ZTEST_USER()
434 /* Attempt to unlock IRQs in user mode */ in ZTEST_USER()
438 /* The first system call has left the IRQs locked. in ZTEST_USER()
447 /* Verify that thread is not able to infer that IRQs are locked. */ in ZTEST_USER()
[all …]
/Zephyr-Core-3.5.0/arch/arm/core/mpu/cortex_m/
Darm_mpu_internal.h60 /* Lock IRQs to ensure RNR value is correct when reading RASR. */ in is_enabled_region()
81 /* Lock IRQs to ensure RNR value is correct when reading RASR. */ in get_region_ap()
106 /* Lock IRQs to ensure RNR value is correct when reading RBAR, RASR. */ in is_in_region()
/Zephyr-Core-3.5.0/tests/arch/arm/arm_irq_vector_table/
DKconfig4 int "Number of IRQs for this test, made overridable in the .conf file"
/Zephyr-Core-3.5.0/arch/riscv/core/
Dfpu.c67 __ASSERT((status & MSTATUS_IEN) == 0, "must be called with IRQs disabled"); in z_riscv_fpu_disable()
80 "must be called with IRQs disabled"); in z_riscv_fpu_load()
104 "must be called with IRQs disabled"); in z_riscv_flush_local_fpu()
136 "must be called with IRQs disabled"); in flush_owned_fpu()
220 * by disabling IRQs as we wouldn't be able to preserve the in z_riscv_fpu_trap()
257 "must be called with IRQs disabled"); in fpu_access_allowed()
286 * access as we want to make sure IRQs are disabled before in fpu_access_allowed()
/Zephyr-Core-3.5.0/arch/arm64/core/
Dfpu.c69 __ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled"); in z_arm64_flush_local_fpu()
97 __ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled"); in flush_owned_fpu()
142 __ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled"); in z_arm64_fpu_enter_exc()
226 __ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled"); in z_arm64_fpu_trap()
251 * by disabling IRQs as we wouldn't be able to preserve the in z_arm64_fpu_trap()
284 __ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled"); in fpu_access_update()
300 * access as we want to make sure IRQs are disabled before in fpu_access_update()
/Zephyr-Core-3.5.0/include/zephyr/arch/arm/cortex_m/
Dexc.h32 * The highest priority level may be shared with either Zero-Latency IRQs (if
34 * Regular HW IRQs are always assigned priority levels lower than the priority
35 * levels for SVCalls, Zero-Latency IRQs and processor faults.
/Zephyr-Core-3.5.0/tests/kernel/timer/timer_behavior/
Dprj.conf6 # 115200 bauds would grab the printk lock and disable IRQs for more
/Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/niosv/
DKconfig.defconfig.series12 config NUM_IRQS # Platform interrupts IRQs index start from index 16
/Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/
Dsnps,designware-intc.yaml17 num-irqs:
Dintel,ace-intc.yaml17 num-irqs:
Dsnps,archs-idu-intc.yaml7 common/external IRQs towards the core interrupt controller.
/Zephyr-Core-3.5.0/tests/arch/riscv/fpu_sharing/src/
Dmain.c272 /* Simulate a user syscall environment by having IRQs enabled */ in exception_context()
284 /* IRQs should have been disabled on us to prevent recursive FPU usage */ in exception_context()
285 zassert_true((csr_read(mstatus) & MSTATUS_IEN) == 0, "IRQs should be disabled"); in exception_context()
296 /* We're not in exception so IRQs should be enabled. */ in ZTEST()
297 zassert_true((csr_read(mstatus) & MSTATUS_IEN) != 0, "IRQs should be enabled"); in ZTEST()
301 zassert_true((csr_read(mstatus) & MSTATUS_IEN) != 0, "IRQs should be enabled"); in ZTEST()
314 zassert_true((csr_read(mstatus) & MSTATUS_IEN) != 0, "IRQs should be enabled"); in ZTEST()
325 zassert_true((csr_read(mstatus) & MSTATUS_IEN) != 0, "IRQs should be enabled"); in ZTEST()
/Zephyr-Core-3.5.0/soc/arc/snps_nsim/
DKconfig.defconfig.vpx511 # 0 for Fast Interrupts (FIRQs) and 1-15 for Regular Interrupts (IRQs).
DKconfig.defconfig.hs11 # 0 for Fast Interrupts (FIRQs) and 1-15 for Regular Interrupts (IRQs).
DKconfig.defconfig.hs_mpuv611 # 0 for Fast Interrupts (FIRQs) and 1-15 for Regular Interrupts (IRQs).
DKconfig.defconfig.sem11 # 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
/Zephyr-Core-3.5.0/soc/arc/snps_emsk/
DKconfig.defconfig.em9d12 # 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
/Zephyr-Core-3.5.0/soc/arc/snps_arc_hsdk/
DKconfig.defconfig14 # 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).

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