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/Zephyr-latest/soc/silabs/
DKconfig3 # SPDX-License-Identifier: Apache-2.0
18 Set if the Back-Up Real Time Counter (BURTC) HAL module is used.
54 Set if the Inter-Integrated Circuit Interface (I2C) HAL module is used.
217 in on-demand mode, after SoC is initialized.
220 prompt "High Frequency Clock Selection"
224 bool "External high frequency crystal oscillator"
226 Set this option to use the external high frequency crystal oscillator
227 as high frequency clock.
230 bool "External low frequency crystal oscillator"
233 Set this option to use the external low frequency crystal oscillator
[all …]
/Zephyr-latest/dts/bindings/can/
Dti,tcan4x5x.yaml2 # SPDX-License-Identifier: Apache-2.0
12 spi-max-frequency = <18000000>;
13 clock-frequency = <40000000>;
14 device-state-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
15 device-wake-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
16 reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
17 int-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
18 bosch,mram-cfg = <0x0 15 15 5 5 0 10 10>;
21 can-transceiver {
22 max-bitrate = <8000000>;
[all …]
/Zephyr-latest/drivers/clock_control/
DKconfig.nrf4 # SPDX-License-Identifier: Apache-2.0
62 If calibration is disabled when RC is used for low frequency clock then
63 accuracy of the low frequency clock will degrade. Disable on your own
204 int "Frequency request timeout in milliseconds"
208 bool "Request LOW frequency on init"
211 The GDFS service will default to HIGH frequency until it receives
212 a lower frequency request. The NRF2 clock controller drivers
213 expect the clock to be initialized to their lowest frequency, so
218 unnecessary HIGH -> LOW -> HIGH cycle given some module will
219 request a HIGH frequency on init anyway.
/Zephyr-latest/drivers/led_strip/
DKconfig.ws28124 # SPDX-License-Identifier: Apache-2.0
8 # https://wp.josh.com/2014/05/13/ws2812-neopixels-are-not-so-finicky-once-you-get-to-know-them/
33 # Only an Cortex-M inline assembly implementation for the nRF91, nRF51,
41 controlling with GPIO. The GPIO driver does bit-banging with inline
49 DT_CHOSEN_LED_STRIP := zephyr,led-strip
53 int "Delay 1 bit high pulse"
54 default $(dt_node_int_prop_int,$(DT_CHOSEN_LED_STRIP_PATH),delay-t1h) \
55 if $(dt_node_has_prop,$(DT_CHOSEN_LED_STRIP_PATH),delay-t1h)
56 default $(div,$(mul,700,$(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)),1000000000) \
57 if $(dt_node_has_prop,/cpus/cpu@0,clock-frequency)
[all …]
/Zephyr-latest/dts/bindings/sensor/
Dadi,adxl372-common.yaml2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
11 Accelerometer sampling frequency (ODR). Default is power on reset value.
18 - 0
19 - 1
20 - 2
21 - 3
22 - 4
28 Low-Pass (Antialiasing) Filter corner frequency. Default is power on reset value.
36 - 0
[all …]
Dti,fdc2x1x.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: [sensor-device.yaml, i2c-device.yaml]
11 sd-gpios:
12 type: phandle-array
14 The SD pin defaults to active high when consumed by the sensor.
18 intb-gpios:
19 type: phandle-array
28 Set to identify the sensor as FDC2114 or FDC2214 (4-channel version)
33 Set the Auto-Scan Mode.
36 "active-channel" (single channel mode).
[all …]
/Zephyr-latest/dts/bindings/mipi-dsi/
Dst,stm32-mipi-dsi.yaml4 # SPDX-License-Identifier: Apache-2.0
9 compatible: "st,stm32-mipi-dsi"
11 include: [mipi-dsi-host.yaml, reset-device.yaml]
17 clock-names:
23 "refclk" and "pixelclk" are only used to retrieve the frequency for timing calculation.
28 hs-active-high:
31 DSI host horizontal synchronization is active high.
33 vs-active-high:
36 DSI host vertical synchronization is active high.
38 de-active-high:
[all …]
/Zephyr-latest/dts/bindings/clock/
Dsilabs,series2-hfrcoem23.yaml1 compatible: "silabs,series2-hfrcoem23"
3 include: fixed-clock.yaml
6 Silicon Labs HFRCOEM23 peripheral (high-frequency RC oscillator with energy mode 2 and 3
7 capability). `clock-frequency` represents the HFRCO band to use.
10 clock-frequency:
12 - 1000000
13 - 2000000
14 - 4000000
15 - 13000000
16 - 16000000
[all …]
Dnordic,nrf-auxpll.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The output frequency (f_out) of the auxiliary PLL is calculated as follows:
9 f_out = ((R + A * 2^(-16)) * f_src) / B
13 - A: nordic,frequency
14 - B: nordic,outdiv
15 - R: nordic,range (3=low, 4=mid, 5=high, 6=statichigh)
16 - f_src: Source frequency, given by clocks
18 compatible: "nordic,nrf-auxpll"
21 - base.yaml
22 - clock-controller.yaml
[all …]
Dnordic,nrf54h-hfxo.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF54H Series high-frequency crystal oscillator
6 compatible: "nordic,nrf54h-hfxo"
8 include: fixed-clock.yaml
11 clock-frequency:
14 accuracy-ppm:
Dsilabs,series2-hfrcodpll.yaml1 compatible: "silabs,series2-hfrcodpll"
4 Silicon Labs HFRCODPLL peripheral (high-frequency RC oscillator with digital phase-locked loop).
5 Can be used as a free-running RC oscillator or with PLL lock to the crystal oscillators HFXO
7 the `dpll-*` options to desired values.
9 In PLL mode, `clock-frequency` represents the target PLL frequency.
10 In free-running mode, `clock-frequency` represents the HFRCO band to use.
12 include: fixed-clock.yaml
15 dpll-n:
18 dpll-m:
21 dpll-edge:
[all …]
Dnordic,nrf53-hfxo.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF high-frequency crystal oscillator (nRF53 series)
6 compatible: "nordic,nrf53-hfxo"
8 include: fixed-clock.yaml
11 clock-frequency:
14 load-capacitors:
17 - "internal"
18 - "external"
22 load-capacitance-femtofarad:
25 - 7000
[all …]
/Zephyr-latest/dts/bindings/display/
Dsharp,ls0xx.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: [spi-device.yaml, display-controller.yaml]
11 extcomin-gpios:
12 type: phandle-array
18 extcomin-frequency:
20 description: EXTCOMIN pin toggle frequency
22 The frequency with which the EXTCOMIN pin should be toggled. See
23 datasheet of particular display. Higher frequency gives better
24 contrast while low frequency saves power.
26 disp-en-gpios:
[all …]
/Zephyr-latest/samples/boards/nordic/clock_control/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
5 int "Frequency specification to request from clock in Hz"
8 0 -> ignore frequency
9 >0 -> use at minimum selected frequency. To select the
10 highest supported frequency use UINT32_MAX.
16 0 -> ignore accuracy
17 1 -> use max accuracy
18 >1 -> use at minimum selected accuracy
24 0 -> low precision
25 1 -> high precision
/Zephyr-latest/dts/bindings/i3c/
Dnxp,mcux-i3c.yaml4 # SPDX-License-Identifier: Apache-2.0
8 compatible: "nxp,mcux-i3c"
10 include: [i3c-controller.yaml, pinctrl-device.yaml]
19 i3c-od-scl-hz:
22 Open Drain Frequency for the I3C controller. When undefined, use
25 clk-divider:
30 clk-divider-tc:
35 clk-divider-slow:
40 disable-open-drain-high-pp:
43 If false, open drain high time is 1 PPBAUD count,
[all …]
Di3c-device.yaml2 # SPDX-License-Identifier: Apache-2.0
8 on-bus: i3c
23 ID left-shifted by 1, where the manufacturer ID is
24 the bits 33-47 (zero-based) of the 48-bit Provisioned ID.
26 the part ID (bits 16-31 of the Provisioned ID) left-shifted
27 by 16, and the instance ID (bits 12-15 of the Provisioned ID)
28 left-shifted by 12. Basically, this is the lower 32 bits
33 where the PID part is expanded to be a 64-bit integer.
37 1. 7-bit address of the I2C device. (Note that 10-bit
44 it is not affected by high frequency on SCL.
[all …]
/Zephyr-latest/dts/bindings/auxdisplay/
Dsparkfun,serlcd.yaml2 # SPDX-License-Identifier: Apache-2.0
14 command-delay-ms = <10>;
15 special-command-delay-ms = <50>;
21 include: [auxdisplay-device.yaml, i2c-device.yaml]
28 - 16
29 - 20
35 - 2
36 - 4
38 command-delay-ms:
46 high update frequency of the display.
[all …]
/Zephyr-latest/subsys/logging/backends/
DKconfig.swo2 # SPDX-License-Identifier: Apache-2.0
14 int "SWO reference clock frequency"
15 …default $(dt_node_int_prop_int,$(dt_nodelabel_path,itm),swo-ref-frequency) if $(dt_nodelabel_enabl…
16 …fault $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if $(dt_node_has_prop,/cpus/cpu@0,clock-…
19 Set SWO reference frequency. In most cases it is equal to CPU
20 frequency.
23 int "Set SWO output frequency"
26 Set SWO output frequency. Value 0 will select maximum frequency
27 supported by the given MCU. Not all debug probes support high
28 frequency SWO operation. In this case the frequency has to be set
[all …]
/Zephyr-latest/soc/silabs/common/
Dsoc.c4 * SPDX-License-Identifier: Apache-2.0
26 * @brief Initialization parameters for the external high frequency oscillator
33 * @brief Initialization parameters for the external low frequency oscillator
49 if ((DEVINFO->MODULEINFO & DEVINFO_MODULEINFO_LFXOCALVAL) == in init_lfxo()
52 (DEVINFO->MODXOCAL & _DEVINFO_MODXOCAL_LFXOCAPTUNE_MASK) >> in init_lfxo()
80 if ((DEVINFO->MODULEINFO & DEVINFO_MODULEINFO_HFXOCALVAL) == in clock_init()
83 (DEVINFO->MODXOCAL & _DEVINFO_MODXOCAL_HFXOCTUNEXOANA_MASK) >> in clock_init()
86 (DEVINFO->MODXOCAL & _DEVINFO_MODXOCAL_HFXOCTUNEXIANA_MASK) >> in clock_init()
119 /* Setting system HFRCO frequency */ in clock_init()
122 /* Using HFRCO as high frequency clock, HFCLK */ in clock_init()
[all …]
/Zephyr-latest/dts/bindings/rtc/
Dxlnx,xps-timer-1.00.a.yaml3 compatible: "xlnx,xps-timer-1.00.a"
8 # https://github.com/Xilinx/meta-xilinx
11 clock-frequency:
14 xlnx,count-width:
18 - 8
19 - 16
20 - 32
24 xlnx,gen0-assert:
27 - 0
28 - 1
[all …]
/Zephyr-latest/drivers/spi/
Dspi_nxp_s32.c2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
15 struct spi_context *ctx = &data->ctx; in spi_nxp_s32_last_packet()
17 if (ctx->tx_count <= 1U && ctx->rx_count <= 1U) { in spi_nxp_s32_last_packet()
18 if (!spi_context_tx_on(ctx) && (data->transfer_len == ctx->rx_len)) { in spi_nxp_s32_last_packet()
22 if (!spi_context_rx_on(ctx) && (data->transfer_len == ctx->tx_len)) { in spi_nxp_s32_last_packet()
26 if ((ctx->rx_len == ctx->tx_len) && (data->transfer_len == ctx->tx_len)) { in spi_nxp_s32_last_packet()
41 const struct spi_nxp_s32_config *config = dev->config; in spi_nxp_s32_transfer_next_packet()
42 struct spi_nxp_s32_data *data = dev->data; in spi_nxp_s32_transfer_next_packet()
49 data_cb = config->cb; in spi_nxp_s32_transfer_next_packet()
[all …]
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,imx8ulp-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,imx8ulp-pinctrl"
10 child-binding:
12 child-binding:
15 - name: pincfg-node.yaml
16 property-allowlist:
17 - bias-pull-up
18 - bias-pull-down
19 - drive-open-drain
24 drive-strength:
[all …]
/Zephyr-latest/soc/nxp/kinetis/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
35 Set this option to use the oscillator in low-power mode.
38 bool "High gain oscillator"
40 Set this option to use the oscillator in high-gain mode.
45 int "External oscillator frequency"
47 Set the external oscillator frequency in Hz. This should be set by the
60 The resulting frequency must be in the range of 2 MHz to 4 MHz.
69 frequency.
77 resulting frequency must be in the range 31.25 kHz to 4 MHz.
85 FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
[all …]
/Zephyr-latest/boards/adafruit/qt_py_esp32s3/
Dadafruit_qt_py_esp32s3_procpu.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
11 #include <zephyr/dt-bindings/led/led.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 #include "adafruit_qt_py_esp32s3-pinctrl.dtsi"
19 compatible = "seeed,xiao-esp32s3";
24 zephyr,shell-uart = &usb_serial;
26 zephyr,code-partition = &slot0_partition;
27 zephyr,bt-hci = &esp32_bt_hci;
31 i2c-0 = &i2c0;
[all …]
/Zephyr-latest/samples/drivers/led/led_strip/boards/
Dmimxrt1050_evk_mimxrt1052_hyperflash.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/led/led.h>
11 compatible = "worldsemi,ws2812-spi";
15 spi-max-frequency = <6400000>;
18 chain-length = <2>; /* arbitrary; change at will */
19 spi-cpha;
20 spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */
21 spi-zero-frame = <0xc0>; /* 11000000: 312.5 ns high and 937.5 ns low */
22 color-mapping = <LED_COLOR_ID_GREEN
30 led-strip = &led_strip;

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