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/Zephyr-latest/doc/connectivity/bluetooth/img/
Datt_timeout.svg1g><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/><g/>…
/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/images/
Ddfu_stages_procedures_mesh.svg24 <g id="lend13">
26 </g>
34 <g>
36 <g id="shape7-1" transform="translate(1,-420.137)">
39 </g>
40 <g id="shape8-3" transform="translate(18.7898,-457.378)">
45 x="33.22" dy="1.2em" class="st4">Initiator</tspan></text> </g>
46 <g id="shape9-8" transform="translate(428.081,-424.35)">
50 <text x="7.27" y="532.97" class="st6">Upload stage</text> </g>
51 <g id="shape12-11" transform="translate(1,-1)">
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Ddfu_roles_mesh.svg23 <g id="lend13">
25 </g>
30 <g>
32 <g id="shape5-1" transform="translate(1,-1)">
35 </g>
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39 </g>
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/Zephyr-latest/doc/safety/images/
DIEC-61508-basis.svg1g[data-mml-node="merror"] &gt; g {&#xa; fill: red;&#xa; stroke: red;&#xa;}&#xa;&#xa;g[data-mml-n…
/Zephyr-latest/doc/security/media/
Dsensor-model.svg11 <g>
13 </g>
16 <g>
18 </g>
24 …<g id="Canvas_1" fill-opacity="1" stroke-dasharray="none" stroke="none" stroke-opacity="1" fill="n…
27 <g id="Canvas_1: sensor-drawing">
29 <g id="Graphic_40">
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42 </g>
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/Zephyr-latest/doc/connectivity/networking/
Dzephyr_netstack_overview.svg39 <g v:mID="0" v:index="1" v:groupContext="foregroundPage">
46 <g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(25.2651,-395.391)">
54 …<g id="shadow1-2" v:groupContext="shadow" v:shadowOffsetX="0.345598" v:shadowOffsetY="-1.97279" v:…
57 </g>
59 ….18" class="st4" v:langID="1033"><v:paragraph v:horizAlign="1"/><v:tabList/>Socket API</text> </g>
60 <g id="shape57-7" v:mID="57" v:groupContext="shape" transform="translate(25.2651,-212.311)">
68 …<g id="shadow57-8" v:groupContext="shadow" v:shadowOffsetX="0.345598" v:shadowOffsetY="-1.97279" v…
71 </g>
73 …langID="1033"><v:paragraph v:horizAlign="1"/><v:tabList/>Network Interface Abstraction</text> </g>
74 …<g id="shape60-13" v:mID="60" v:groupContext="shape" transform="translate(-327.858,369.021) rotate…
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Dzephyr_netstack_overview-tx_sequence.svg63 <g id="lend4">
65 </g>
74 <g id="lend13">
76 </g>
87 <g v:mID="7" v:index="3" v:groupContext="foregroundPage">
95 <g id="shape143-1" v:mID="143" v:groupContext="shape" transform="translate(180.875,-408.478)">
101 </g>
102 …<g id="shape94-3" v:mID="94" v:groupContext="shape" transform="translate(49.6893,-76.8633) rotate(…
105 </g>
106 …<g id="shape95-6" v:mID="95" v:groupContext="shape" transform="translate(42.0914,-234.72) rotate(-…
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Dzephyr_netstack_overview-rx_sequence.svg69 <g id="lend4">
71 </g>
76 <g id="lend5">
78 </g>
87 <g id="lend13">
89 </g>
104 <g v:mID="6" v:index="2" v:groupContext="foregroundPage">
112 <g id="shape143-1" v:mID="143" v:groupContext="shape" transform="translate(180.875,-408.478)">
118 </g>
119 …<g id="shape94-3" v:mID="94" v:groupContext="shape" transform="translate(49.6893,-76.8633) rotate(…
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/Zephyr-latest/boards/shields/nrf7002eb/
Dnrf7002eb.overlay33 wifi-max-tx-pwr-2g-dsss = <21>;
34 wifi-max-tx-pwr-2g-mcs0 = <16>;
35 wifi-max-tx-pwr-2g-mcs7 = <16>;
36 wifi-max-tx-pwr-5g-low-mcs0 = <13>;
37 wifi-max-tx-pwr-5g-low-mcs7 = <13>;
38 wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
39 wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
40 wifi-max-tx-pwr-5g-high-mcs0 = <12>;
41 wifi-max-tx-pwr-5g-high-mcs7 = <12>;
/Zephyr-latest/boards/native/doc/
DPort_vs_QEMU_vs.svg37 <g id="lend13">
39 </g>
45 <g v:mID="0" v:index="1" v:groupContext="foregroundPage">
50 …<g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(-227.126,181.417) rotate(-9…
53 </g>
54 <g id="shape2-7" v:mID="2" v:groupContext="shape" transform="translate(79.0157,-124.724)">
57 </g>
58 <g id="shape3-12" v:mID="3" v:groupContext="shape" transform="translate(148.465,-53.8583)">
64 …="294.97" class="st4" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>speed</text> </g>
65 <g id="shape4-15" v:mID="4" v:groupContext="shape" transform="translate(-3.18898,-199.134)">
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Dcomponents_bsim.svg4g><g data-cell-id="0"><g data-cell-id="1"><g data-cell-id="_rmC7AOByH2VIv2EB3aU-1"><g><rect x="10"…
Dcomponents_natsim.svg4g><g data-cell-id="0"><g data-cell-id="1"><g data-cell-id="_rmC7AOByH2VIv2EB3aU-1"><g><rect x="10"…
DZephyr_and_bsim.svg31 <g id="lend4">
33 </g>
43 <g v:mID="4" v:index="4" v:groupContext="foregroundPage">
48 <g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(96.5271,-72.455)">
54 …y="299.52" class="st2" v:langID="6153"><v:paragraph/><v:tabList/>HW models<v:tabChar/></text> </g>
55 <g id="shape2-4" v:mID="2" v:groupContext="shape" transform="translate(107.866,-117.809)">
61 …st2" v:langID="6153"><v:paragraph/><v:tabList/><v:newlineChar/><v:newlineChar/>Drivers</text> </g>
62 <g id="shape3-7" v:mID="3" v:groupContext="shape" transform="translate(8.65313,-72.4252)">
69 x="36.88" dy="1.2em" class="st3">Arch</tspan></text> </g>
70 <g id="shape4-11" v:mID="4" v:groupContext="shape" transform="translate(8.65313,-154.66)">
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Dlayering.svg27 <g v:mID="14" v:index="6" v:groupContext="foregroundPage">
31 <g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(10.4612,-46.6765)">
37 …247.08" class="st2" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>CPU/SOC</text> </g>
38 <g id="shape2-4" v:mID="2" v:groupContext="shape" transform="translate(98.3352,-46.6765)">
44 … class="st2" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>HW peripherals</text> </g>
45 <g id="shape3-7" v:mID="3" v:groupContext="shape" transform="translate(109.674,-92.0309)">
51 …228.65" class="st2" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>Drivers</text> </g>
52 <g id="shape4-10" v:mID="4" v:groupContext="shape" transform="translate(10.4612,-92.0309)">
59 x="8.74" dy="1.2em" class="st4">dependent layer</tspan></text> </g>
60 <g id="shape5-14" v:mID="5" v:groupContext="shape" transform="translate(10.4612,-128.881)">
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/Zephyr-latest/boards/shields/nrf7002ek/
Dnrf7002ek_common_5g.dtsi7 wifi-max-tx-pwr-5g-low-mcs0 = <13>;
8 wifi-max-tx-pwr-5g-low-mcs7 = <13>;
9 wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
10 wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
11 wifi-max-tx-pwr-5g-high-mcs0 = <12>;
12 wifi-max-tx-pwr-5g-high-mcs7 = <12>;
/Zephyr-latest/boards/nordic/nrf7002dk/
Dnrf70_common_5g.dtsi7 wifi-max-tx-pwr-5g-low-mcs0 = <9>;
8 wifi-max-tx-pwr-5g-low-mcs7 = <9>;
9 wifi-max-tx-pwr-5g-mid-mcs0 = <11>;
10 wifi-max-tx-pwr-5g-mid-mcs7 = <11>;
11 wifi-max-tx-pwr-5g-high-mcs0 = <13>;
12 wifi-max-tx-pwr-5g-high-mcs7 = <13>;
/Zephyr-latest/samples/subsys/smf/smf_calculator/img/
Dsmf_calculator.svg6 /><g
153 ><g transform="translate(1440,150)"
156 /></g
157 …><g fill="rgb(255,255,255)" fill-opacity="0" transform="translate(1170,920)" stroke-opacity="0" st…
159 /></g
160 ><g transform="translate(1170,920)"
162 /></g
163 …><g fill="rgb(255,255,255)" fill-opacity="0" transform="translate(1120,730)" stroke-opacity="0" st…
165 /></g
166 ><g transform="translate(1120,730)"
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/Zephyr-latest/doc/develop/test/figures/
Dtwister_test_project.svg4g><g data-cell-id="0"><g data-cell-id="1"><g data-cell-id="H5tu8Hv7uEISD1EEp5Ro-3"><g><rect x="0" …
/Zephyr-latest/boards/intel/niosv_g/doc/
Dindex.rst9 niosv_g board is based on Intel FPGA Design Store Nios® V/g Hello World Example Design system and t…
13 Nios® V/g Processor Intel® FPGA IP
17 Nios® V/g hello world example design system
20 Prebuilt Nios® V/g hello world example design system is available in Intel FPGA Design store.
23 For example, Arria10 Nios® V/g processor example design system prebuilt files can be downloaded fro…
24 …t/www/us/en/design-example/776196/intel-arria-10-fpga-hello-world-design-on-nios-v-g-processor.html
28 Create Nios® V/g processor example design system in FPGA
31 Please use Intel Quartus Programmer tool to program Nios® V/g processor based system into the FPGA …
33 In order to create the Nios® V/g processor inside the FPGA device, please download the generated .s…
53 niosv-download -g <elf file>
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/Zephyr-latest/dts/bindings/wifi/
Dwifi-tx-power-5g.yaml17 wifi-max-tx-pwr-5g-low-mcs0:
21 wifi-max-tx-pwr-5g-low-mcs7:
25 wifi-max-tx-pwr-5g-mid-mcs0:
29 wifi-max-tx-pwr-5g-mid-mcs7:
33 wifi-max-tx-pwr-5g-high-mcs0:
37 wifi-max-tx-pwr-5g-high-mcs7:
/Zephyr-latest/scripts/schemas/
Dpatch-schema.yml15 # E.g. zephyr/kernel-pipe-fix-not-k-no-wait-and-ge-min-xfer-bytes.patch
21 # e.g. e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855
28 # e.g. zephyr, or bootloader/mcuboot
33 # The name of the primary author of the patch, e.g. Kermit D. Frog
38 # The email address of the primary author of the patch, e.g. itsnoteasy@being.gr
56 # e.g. https://github.com/zephyrproject-rtos/zephyr/pull/24486
62 # or bug report, e.g. https://github.com/zephyrproject-rtos/zephyr/issues/24485
72 # e.g. af926ae728c78affa89cbc1de811ab4211ed0f69
88 # e.g. "This is a workaround for xyz and probably should not go upstream"
94 # only applies to version 1.2.3, one could specify e.g. custom: [1, 2, 3].
/Zephyr-latest/dts/bindings/sensor/
Dnxp,fxls8974-common.yaml37 Range in g. Default value is 2 because it is the most sensitive setting.
38 16g (7.81 mg/LSB), 8g (3.91 mg/LSB), 4g (1.95 mg/LSB), 2g (0.98 mg/LSB).
/Zephyr-latest/doc/services/input/
Ddiodes-cr.svg16 <g
20 <g
24 <g
28 <g
32 <g
36 <g
40 <g
44 <g
48 <g
52 <g
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Ddiodes-rc.svg16 <g
20 <g
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28 <g
32 <g
36 <g
40 <g
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/Zephyr-latest/drivers/interrupt_controller/
Dintc_ite_it8xxx2_v2.c17 #define IT8XXX2_INTC_BASE_SHIFT(g) (IT8XXX2_INTC_BASE + ((g) << 2)) argument
20 #define IT8XXX2_INTC_ISR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
21 ((g) < 4 ? 0x0 : 0x4))
23 #define IT8XXX2_INTC_IER(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
24 ((g) < 4 ? 0x1 : 0x5))
26 #define IT8XXX2_INTC_IELMR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
27 ((g) < 4 ? 0x2 : 0x6))
29 #define IT8XXX2_INTC_IPOLR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
30 ((g) < 4 ? 0x3 : 0x7))

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