/Zephyr-Core-3.7.0/tests/boards/nrf/dmm/src/ |
D | main.c | 74 static bool dmm_buffer_in_region_check(struct dmm_test_region *dtr, void *buf, size_t size) in dmm_buffer_in_region_check() argument 78 return ((start >= dtr->start) && ((start + size) <= (dtr->start + dtr->size))); in dmm_buffer_in_region_check() 81 static void dmm_check_output_buffer(struct dmm_test_region *dtr, uint32_t *fill_value, in dmm_check_output_buffer() argument 88 retval = dmm_buffer_out_prepare(dtr->mem_reg, data, size, &buf); in dmm_check_output_buffer() 100 zassert_true(dmm_buffer_in_region_check(dtr, buf, size)); in dmm_check_output_buffer() 107 retval = dmm_buffer_out_release(dtr->mem_reg, buf); in dmm_check_output_buffer() 111 static void dmm_check_input_buffer(struct dmm_test_region *dtr, uint32_t *fill_value, in dmm_check_input_buffer() argument 120 retval = dmm_buffer_in_prepare(dtr->mem_reg, data, size, &buf); in dmm_check_input_buffer() 132 zassert_true(dmm_buffer_in_region_check(dtr, buf, size)); in dmm_check_input_buffer() 147 retval = dmm_buffer_in_release(dtr->mem_reg, data, size, buf); in dmm_check_input_buffer() [all …]
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/Zephyr-Core-3.7.0/dts/bindings/serial/ |
D | renesas,smartbond-uart.yaml | 51 dtr-gpios: 54 DTR pin specification. DTR pin when active tells that the driver that there 56 The device driver does not use DTR for hardware flow control. 57 When device is connected to computer serial converter usually asserts DTR
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D | espressif,esp32-uart.yaml | 22 Using this mode, the pin assigned to DTR
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/Zephyr-Core-3.7.0/samples/subsys/usb/console/src/ |
D | main.c | 42 uint32_t dtr = 0; in main() local 54 /* Poll if the DTR flag was set */ in main() 55 while (!dtr) { in main() 56 uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr); in main()
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/Zephyr-Core-3.7.0/samples/subsys/usb/cdc_acm/ |
D | sample.yaml | 12 - "Wait for DTR" 29 - "Wait for DTR" 41 - "Wait for DTR"
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D | README.rst | 58 Wait for DTR 71 DTR set, start test
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/Zephyr-Core-3.7.0/samples/subsys/usb/cdc_acm/src/ |
D | main.c | 74 uint32_t dtr = 0U; in sample_msg_cb() local 76 uart_line_ctrl_get(msg->dev, UART_LINE_CTRL_DTR, &dtr); in sample_msg_cb() 77 if (dtr) { in sample_msg_cb() 194 LOG_INF("Wait for DTR"); in main() 200 uint32_t dtr = 0U; in main() local 202 uart_line_ctrl_get(uart_dev, UART_LINE_CTRL_DTR, &dtr); in main() 203 if (dtr) { in main() 212 LOG_INF("DTR set"); in main()
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/Zephyr-Core-3.7.0/samples/subsys/usb/cdc_acm_composite/src/ |
D | main.c | 120 uint32_t dtr = 0U; in main() local 137 LOG_INF("Wait for DTR"); in main() 140 uart_line_ctrl_get(peers[0].dev, UART_LINE_CTRL_DTR, &dtr); in main() 141 if (dtr) { in main() 149 uart_line_ctrl_get(peers[1].dev, UART_LINE_CTRL_DTR, &dtr); in main() 150 if (dtr) { in main() 157 LOG_INF("DTR set, start test"); in main()
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/Zephyr-Core-3.7.0/tests/drivers/uart/uart_basic_api/src/ |
D | main.c | 52 uint32_t dtr = 0; in uart_basic_setup() local 59 while (!dtr) { in uart_basic_setup() 60 uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr); in uart_basic_setup()
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/Zephyr-Core-3.7.0/soc/espressif/common/ |
D | Kconfig.esptool | 24 please enable `ESPTOOLPY_OCT_FLASH` option, then you can choose `DTR` sample mode 64 bool "DTR Mode" 182 Automatic resetting depends on the RTS & DTR signals being 203 Automatic resetting depends on the RTS & DTR signals being
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/Zephyr-Core-3.7.0/arch/arc/arcmwdt/ |
D | CMakeLists.txt | 4 zephyr_sources(arcmwdt-dtr-stubs.c)
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/Zephyr-Core-3.7.0/dts/bindings/flash_controller/ |
D | st,stm32-xspi-nor.yaml | 13 data-rate = <XSPI_DTR_TRANSFER>; /* access in DTR */ 46 The SPI data Rate is STR or DTR
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D | st,stm32-ospi-nor.yaml | 13 data-rate = <OSPI_DTR_TRANSFER>; /* access in DTR */ 58 The SPI data Rate is STR or DTR
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/Zephyr-Core-3.7.0/drivers/flash/ |
D | Kconfig.mcux | 79 or Octal I/O DTR). 85 bool "DTR"
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/Zephyr-Core-3.7.0/dts/bindings/modem/ |
D | quectel,eg25-g.yaml | 12 mdm-dtr-gpios:
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D | quectel,bg9x.yaml | 18 mdm-dtr-gpios:
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D | telit,me910g1.yaml | 19 mdm-dtr-gpios:
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/Zephyr-Core-3.7.0/samples/subsys/usb/cdc_acm_composite/ |
D | README.rst | 39 Wait for DTR 53 DTR set, start test
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D | sample.yaml | 17 - "Wait for DTR"
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/Zephyr-Core-3.7.0/tests/bluetooth/shell/src/ |
D | main.c | 128 uint32_t dtr = 0; in main() local 135 while (!dtr) { in main() 136 uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr); in main()
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/Zephyr-Core-3.7.0/samples/subsys/modbus/rtu_server/src/ |
D | main.c | 148 uint32_t dtr = 0; in main() local 154 while (!dtr) { in main() 155 uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr); in main()
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/Zephyr-Core-3.7.0/samples/boards/esp32/light_sleep/ |
D | README.rst | 68 check DTR/RTS configuration in the serial monitor. This is not necessary for 69 IDF monitor, but for other tools it might be necessary to set DTR and RTS line
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/Zephyr-Core-3.7.0/include/zephyr/dt-bindings/flash_controller/ |
D | ospi.h | 14 * OPI mode in DTR transfer rate
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/Zephyr-Core-3.7.0/drivers/spi/ |
D | spi_xlnx_axi_quadspi.c | 240 uint32_t dtr = 0U; in xlnx_quadspi_start_tx() local 275 dtr = UNALIGNED_GET((uint8_t *)(ctx->tx_buf)); in xlnx_quadspi_start_tx() 278 dtr = UNALIGNED_GET((uint16_t *)(ctx->tx_buf)); in xlnx_quadspi_start_tx() 281 dtr = UNALIGNED_GET((uint32_t *)(ctx->tx_buf)); in xlnx_quadspi_start_tx() 288 dtr = 0U; in xlnx_quadspi_start_tx() 291 xlnx_quadspi_write32(dev, dtr, SPI_DTR_OFFSET); in xlnx_quadspi_start_tx() 416 LOG_ERR("DTR empty timeout"); in xlnx_quadspi_transceive() 580 /* Enable DTR Empty interrupt */ in xlnx_quadspi_init()
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/Zephyr-Core-3.7.0/subsys/shell/backends/ |
D | shell_uart.c | 138 "DTR check requires CONFIG_UART_LINE_CTRL"); in uart_dtr_check() 141 int dtr, err; in uart_dtr_check() local 143 err = uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr); in uart_dtr_check() 148 return dtr; in uart_dtr_check() 162 /* DTR is active, stop timer and start TX */ in dtr_timer_handler() 173 /* Wait for DTR signal before sending anything to output. */ in uart_tx_handle()
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