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/Zephyr-Core-3.5.0/dts/bindings/dma/
Dst,stm32-bdma.yaml5 STM32 BDMA controller
7 The STM32 BDMA is a general-purpose direct memory access controller
8 capable of supporting 5 or 6 or 7 or 8 independent BDMA channels.
10 BDMA clients connected to the STM32 BDMA controller must use the format
12 channel: a phandle to the BDMA controller plus the following four integer cells:
13 1. channel: the bdma stream from 0 to <bdma-requests>
14 2. slot: bdma request
15 3. channel-config: A 32bit mask specifying the BDMA channel configuration
49 compatible = "st,stm32-bdma";
64 compatible: "st,stm32-bdma"
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/Zephyr-Core-3.5.0/drivers/dma/
Ddma_stm32_bdma.c8 * @brief Common part of BDMA drivers for stm32.
444 static int bdma_stm32_disable_channel(BDMA_TypeDef *bdma, uint32_t id) in bdma_stm32_disable_channel() argument
449 if (stm32_bdma_disable_channel(bdma, id) == 0) { in bdma_stm32_disable_channel()
464 /* The BDMA can only access memory addresses in SRAM4 */ in bdma_stm32_is_valid_memory_address()
488 BDMA_TypeDef *bdma = (BDMA_TypeDef *)dev_config->base; in bdma_stm32_configure() local
496 LOG_ERR("cannot configure the bdma channel %d.", id); in bdma_stm32_configure()
501 LOG_ERR("bdma channel %d is busy.", id); in bdma_stm32_configure()
505 if (bdma_stm32_disable_channel(bdma, id) != 0) { in bdma_stm32_configure()
506 LOG_ERR("could not disable bdma channel %d.", id); in bdma_stm32_configure()
660 * with bdma mux, in bdma_stm32_configure()
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DKconfig.stm3217 Driver for STM32 DMA V1, V2, V2bis and BDMA types.
63 bool "STM32 BDMA driver"
68 BDMA driver for STM32H7 series SoCs.
Ddmamux_stm32.c297 /* DMA 1 and DMA2 for DMAMUX1, BDMA for DMAMUX2 */ in dmamux_stm32_init()
377 * DMAMUX2 is used by BDMA
/Zephyr-Core-3.5.0/tests/drivers/dma/loop_transfer/boards/
Dnucleo_h743zi.conf4 # Required by BDMA which only has access to
Dnucleo_h743zi.overlay17 /* The BDMA driver expects the SRAM4 region
/Zephyr-Core-3.5.0/tests/drivers/dma/chan_blen_transfer/boards/
Dnucleo_h743zi.conf5 # Required by BDMA which only has access to
Dnucleo_h743zi.overlay19 /* The BDMA driver expects the SRAM4 region
/Zephyr-Core-3.5.0/dts/arm/st/h7/
Dstm32h7.dtsi899 bdma1: bdma@58025400 {
900 compatible = "st,stm32-bdma";
933 /* dmamux2 has no dedicated clock, so we enable bdma clock */
/Zephyr-Core-3.5.0/modules/
DKconfig.stm32598 Enable STM32Cube Basic direct memory access controller (BDMA) LL
/Zephyr-Core-3.5.0/doc/releases/
Drelease-notes-3.4.rst855 * STM32H7: Added support for BDMA