Searched full:armv8 (Results 1 – 25 of 214) sorted by relevance
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/Zephyr-latest/arch/arm/core/cortex_m/ |
D | Kconfig | 139 in CPUs implementing the ARMv7-M or ARMv8-M architectures. 140 Optional in CPUs implementing ARMv6-M, ARMv8-M Baseline 152 can descend. MSPLIM, PSPLIM are always present in ARMv8-M 153 MCUs that implement the ARMv8-M Main Extension (Mainline). 155 In an ARMv8-M Mainline implementation with the Security Extension 157 In an ARMv8-M Baseline implementation with the Security Extension 187 implementation, or the use of an ARMv8-M processor 195 - ARMv6-M compatibility is provided by all ARMv8-M 203 This option signifies the use of an ARMv8-M processor 206 ARMv8-M Baseline includes additional features [all …]
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D | pm_s2ram.S | 51 /* `push` on ARMv6-M / ARMv8-M Baseline: 63 /* `push` on ARMv7-M and ARMv8-M Mainline: no limitation */ 73 /* `pop` on ARMv6-M / ARMv8-M Baseline: 86 /* `pop` on ARMv7-M and ARMv8-M Mainline: no limitation */ 93 /* Registers present only on ARMv7-M and ARMv8-M Mainline */ 108 /* Registers present only on certain ARMv8-M implementations */
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/Zephyr-latest/cmake/toolchain/llvm/ |
D | target.cmake | 11 # ARMv8-M mainline is ARMv7-M with additional features from ARMv8-M. 14 # ARMv8-M baseline is ARMv6-M with additional features from ARMv8-M. 17 # ARMV7_M_ARMV8_M_MAINLINE means that ARMv7-M or backward compatible ARMv8-M 21 # ARMV6_M_ARMV8_M_BASELINE means that ARMv6-M or ARMv8-M supporting the
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/Zephyr-latest/arch/arm64/core/cortex_r/ |
D | Kconfig | 21 The ARMv8-R MPU architecture requires a power-of-two alignment 24 The ARMv8-R MPU requires the active MPU regions be non-overlapping. 25 As a result of this, the ARMv8-R MPU needs to fully partition the 29 of the ARMv8-R background memory map. The application developer may 33 SRAM area covered only by the default ARMv8-R memory map. This 41 of full partitioning the default behavior for the ARMv8-R MPU
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/Zephyr-latest/boards/arm/fvp_baser_aemv8r/doc/ |
D | aarch64.rst | 14 This board configuration uses Armv8-R AEM FVP [1]_ to emulate a generic 15 Armv8-R [2]_ 64-bit hardware platform. 22 The Armv8-R AEM FVP is a free of charge Armv8-R Fixed Virtual Platform. It 23 supports the latest Armv8-R feature set. Please refer to FVP documentation 26 To Run the Fixed Virtual Platform simulation tool you must download "Armv8-R AEM 30 The current minimum required version of "Armv8-R AEM FVP" is 11.16.16. 56 to the official Armv8-R AEM FVP memory map document [4]_. 112 .. [2] Arm Architecture Reference Manual Supplement - Armv8, for Armv8-R AArch64 architecture profi…
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D | aarch32.rst | 9 This board configuration uses Armv8-R AEM FVP [1]_ to emulate a generic 10 Armv8-R [2]_ 32-bit hardware platform. 17 The Armv8-R AEM FVP is a free of charge Armv8-R Fixed Virtual Platform. It 18 supports the latest Armv8-R feature set. Please refer to FVP documentation 21 To Run the Fixed Virtual Platform simulation tool you must download "Armv8-R AEM 47 to the official Armv8-R AEM FVP memory map document [4]_. 102 .. [2] Arm Architecture Reference Manual Supplement - Armv8, for Armv8-R AArch32 architecture profi…
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/Zephyr-latest/dts/bindings/mmu_mpu/ |
D | arm,armv8.1m-mpu.yaml | 1 description: ARMv8.1-M MPU (Memory Protection Unit) 3 compatible: "arm,armv8.1m-mpu"
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D | arm,armv8m-mpu.yaml | 1 description: ARMv8-M MPU (Memory Protection Unit)
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/Zephyr-latest/arch/arm/core/mpu/ |
D | Kconfig | 26 The NXP MPU as well as the ARMv8-M MPU do not require MPU regions 29 The ARMv8-M MPU requires the active MPU regions be non-overlapping. 30 As a result of this, the ARMv8-M MPU needs to fully partition the 34 of the ARMv8-M background memory map. The application developer may 38 SRAM area covered only by the default ARMv8-M memory map. This 46 of full partitioning the default behavior for the ARMv8-M MPU
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/Zephyr-latest/dts/bindings/timer/ |
D | arm,armv8.1m-systick.yaml | 4 description: ARMv8.1-M System Tick 6 compatible: "arm,armv8.1m-systick"
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D | arm,armv8-timer.yaml | 3 compatible: "arm,armv8-timer"
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/Zephyr-latest/include/zephyr/arch/arm/cortex_m/ |
D | nvic.h | 13 /* The order here is on purpose since ARMv8.1-M SoCs may define 15 * CONFIG_ARMV8_M_MAINLINE so we want to check for ARMv8.1-M first.
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/Zephyr-latest/samples/subsys/llext/modules/ |
D | sample.yaml | 6 - qemu_cortex_a53 # ARM Cortex-A53 (ARMv8-A ISA) 8 - mps2/an521/cpu0 # ARM Cortex-M33 (ARMv8-M ISA)
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/Zephyr-latest/boards/xen/xenvm/ |
D | xenvm.dts | 17 #include <arm64/armv8-a.dtsi> 38 compatible = "arm,armv8"; 63 compatible = "arm,armv8-timer";
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D | board.yml | 3 full_name: ARMv8 Xen Virtual Machine Example
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D | xenvm.yaml | 2 name: ARMv8 Xen Virtual Machine
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D | xenvm_xenvm_gicv3.yaml | 2 name: ARMv8 Xen Virtual Machine With GICv3
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/Zephyr-latest/boards/qemu/cortex_a53/doc/ |
D | index.rst | 105 1. (ID050815) ARM® Cortex®-A Series - Programmer’s Guide for ARMv8-A 106 2. (ID070919) Arm® Architecture Reference Manual - Armv8, for Armv8-A architecture profile 107 3. (ARM DAI 0527A) Application Note Bare-metal Boot Code for ARMv8-A Processors 109 5. Fundamentals of ARMv8-A
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/Zephyr-latest/modules/trusted-firmware-m/psa/ |
D | GNUARM.cmake | 14 set(TARGET_SWITCH "-march=armv8-m.main -mcmse") 16 set(TARGET_SWITCH "-march=armv8-m.base -mcmse")
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/Zephyr-latest/dts/arm64/broadcom/ |
D | viper-a72.dtsi | 7 #include <arm64/armv8-a.dtsi> 25 compatible = "arm,armv8-timer";
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/Zephyr-latest/dts/arm/renesas/rcar/gen4/ |
D | rcar_gen4_cr52.dtsi | 8 #include <arm64/armv8-r.dtsi> 25 compatible = "arm,armv8-timer";
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/Zephyr-latest/boards/renesas/rcar_h3ulcb/ |
D | board.yml | 3 full_name: R-CAR H3 ARM CA57 (ARMv8)
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/Zephyr-latest/boards/renesas/rcar_salvator_xs/ |
D | board.yml | 3 full_name: R-CAR Salvator XS M3 ARM CA57 (ARMv8)
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/Zephyr-latest/arch/arm64/core/ |
D | Kconfig | 203 bool "ARMv8-A Normal World (Non-Secure world of Trustzone)" 215 This option signifies the use of an ARMv8-A processor 219 The Armv8-A architecture introduces the ability to use 64-bit and 241 This option signifies the use of an ARMv8-R processor 245 The Armv8-R architecture targets at the Real-time profile. It introduces
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/Zephyr-latest/dts/bindings/debug/ |
D | arm,armv8m-itm.yaml | 5 ARMv8 instrumentation trace macrocell. Used for single wire output (SWO)
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