Searched full:ahb6_clk (Results 1 – 3 of 3) sorted by relevance
180 AHB6 prescaler. The AHB6 bus clock (AHB6_CLK) is derived from the Core clock (CLK) via a183 - The maximum AHB6_CLK frequency is either the CLK frequency divided by 1 or 100 MHz.185 1, AHB6_CLK = CORE_CLK186 2, AHB6_CLK = CORE_CLK / 2187 4, AHB6_CLK = CORE_CLK / 4
88 #define AHB6DIV_VAL 1 /* AHB6_CLK = CORE_CLK/2 */90 #define AHB6DIV_VAL 0 /* AHB6_CLK = CORE_CLK */
173 "Invalid AHB6_CLK setting");
