Home
last modified time | relevance | path

Searched full:a8 (Results 1 – 25 of 35) sorted by relevance

12

/Zephyr-latest/arch/xtensa/core/
Dcrt1.S43 # define ARG3 a8 /* 3rd outgoing call argument */
158 * a8 = start address of bytes to be zeroed
166 .L0zte: l32i a8, a6, 0 /* get start address, assumed multiple of 4 */
169 sub a10, a9, a8 /* a10 = length, assumed a multiple of 4 */
171 s32i a0, a8, 0 /* clear 4 bytes to make len multiple of 8 */
172 addi a8, a8, 4
174 s32i a0, a8, 0 /* clear 8 bytes to make len multiple of 16 */
175 s32i a0, a8, 4
176 addi a8, a8, 8
179 s32i a0, a8, 0 /* clear 16 bytes at a time... */
[all …]
Dsyscall_helper.c25 register uintptr_t a8 __asm__("%a8") = arg5; in xtensa_syscall_helper_args_6()
31 "r" (a5), "r" (a8), "r" (a9) in xtensa_syscall_helper_args_6()
46 register uintptr_t a8 __asm__("%a8") = arg5; in xtensa_syscall_helper_args_5()
51 "r" (a5), "r" (a8) in xtensa_syscall_helper_args_5()
Dwindow_vectors.S112 rotw -1 /* original a0 goes to a8 */
113 _bbci.l a8, 30, _WindowUnderflow8
125 * a8-a15 must be preserved;
154 * a8-a15 must be preserved (they are call[i+1].reg[0..7]);
201 s32e a8, a0, -32 /* save a8 to end of call[j]'s stack frame */
234 l32e a8, a11, -32 /* restore a8 from end of call[i]'s stack frame */
Duserspace.S18 * a2 a6, a3, a4, a5, a8, a9
166 * arg5 = a8
169 mov a10, a8
171 mov a8, a4
328 l32i a8, a1, 12
Dthread.c106 * begins the C function. And A4-A7 and A8-A11 are optional in init_stack()
117 frame->a8 = (uintptr_t)arg2; /* a8 */ in init_stack()
Dcoredump.c73 uint32_t a8; member
167 arch_blk.r.a8 = frame->blks[regs_blk_remaining].r0; in arch_coredump_info_dump()
Dxtensa_asm2_util.S55 * the A4-A7, A8-A11 and A12-A15 quads), if we find a one,
69 s32i a8, a1, 0
116 l32i a8, a2, 0
DREADME_WINDOWS.rst18 (respectively) A0-A3, A4-A7, A8-A11, and A12-A15.
/Zephyr-latest/include/zephyr/arch/xtensa/
Dsyscall.h57 * a2 a6, a3, a4, a5, a8, a9
75 register uintptr_t a8 __asm__("%a8") = arg5; in arch_syscall_invoke6()
81 "r" (a5), "r" (a8), "r" (a9) in arch_syscall_invoke6()
100 register uintptr_t a8 __asm__("%a8") = arg5; in arch_syscall_invoke5()
105 "r" (a5), "r" (a8) in arch_syscall_invoke5()
/Zephyr-latest/boards/shields/waveshare_epaper/
Dwaveshare_epaper_gdeh0213b72.overlay32 sdv = [41 a8 32];
55 sdv = [41 a8 32];
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Dxtensa.py292 A8 = 97 variable in GdbRegDef_Sample_Controller.RegNum
326 A8 = 165 variable in GdbRegDef_ESP32.RegNum
358 A8 = 163 variable in GdbRegDef_ESP32S2.RegNum
388 A8 = 220 variable in GdbRegDef_ESP32S3.RegNum
429 A8 = 166 variable in GdbRegDef_Intel_Adsp_CAVS_Zephyr.RegNum
469 A8 = 264 variable in GdbRegDef_Intel_Adsp_CAVS_XCC.RegNum
504 A8 = 113 variable in GdbRegDef_DC233C.RegNum
/Zephyr-latest/arch/xtensa/include/
Dxtensa_asm2_context.h61 * - Saved A8 /
189 uintptr_t a8; member
210 uintptr_t a8; member
/Zephyr-latest/dts/bindings/gpio/
Dsparkfun-pro-micro-header.yaml29 8 D8/A8 D16 16
/Zephyr-latest/boards/sparkfun/pro_micro_rp2040/
Dsparkfun_pro_micro_connector.dtsi22 , <8 0 &gpio0 8 0> /* D8/A8 */
/Zephyr-latest/boards/adafruit/kb2040/
Dsparkfun_pro_micro_connector.dtsi22 , <8 0 &gpio0 8 0> /* D8/A8 */
/Zephyr-latest/boards/phytec/reel_board/
Dreel_board_nrf52840_2.overlay49 sdv = [41 a8 32];
93 sdv = [41 a8 32];
/Zephyr-latest/arch/xtensa/core/startup/
Dreset_vector.S411 2: extui a8, a2, 28, 4 /* get next attribute nibble (msb first) */
412 extui a5, a8, 0, 2 /* lower two bit indicate whether cached */
416 addx4 a5, a8, a3 /* index into _xtos_mpu_attribs table */
417 addi a8, a8, -5 /* make valid attrib indices negative */
418 movgez a5, a3, a8 /* if not valid attrib, use Illegal */
438 /* set CACHEATTR from a2 (clobbers a3-a8) */
/Zephyr-latest/boards/seeed/wio_terminal/
Draspberrypi_40pins_connector.dtsi37 <25 0 &porta 6 0>, /* A8/D8 */
/Zephyr-latest/samples/tfm_integration/psa_crypto/
DREADME.rst275 00000060 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 ................
330 00000000 EE F1 FE A6 A8 41 5F CC A6 3A 73 A7 C1 33 B4 78 .....A_..:s..3.x
333 00000030 E6 6C 54 7B 29 1D 3B A2 D8 E3 C4 79 17 BA 34 A8 .lT{).;....y..4.
343 00000020 C0 92 12 97 4D D7 62 BC A0 0A 34 A7 CE A8 78 18 ....M.b...4...x.
350 00000090 EA F8 8E 32 7D 81 A0 21 0C 82 4A A8 4C EE 9C 0E ...2}..!..J.L...
365 00000010 C4 C0 B1 E9 64 CB 45 1F E3 4A 95 52 A8 75 B2 8C ....d.E..J.R.u..
/Zephyr-latest/drivers/interrupt_controller/
Dintc_dw.h68 uint32_t irq_vector_13; /* offset a8 */
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dpower_down_cavs.S41 #define temp_reg2 a8
/Zephyr-latest/soc/intel/intel_adsp/ace/
Dpower_down.S35 #define temp_reg2 a8
/Zephyr-latest/boards/gaisler/generic_leon3/doc/
Dindex.rst67 400040A8 initlevel 40B [===============>] 100%
/Zephyr-latest/boards/gaisler/gr716a_mini/doc/
Dindex.rst148 300040A8 initlevel 40B [===============>] 100%
/Zephyr-latest/arch/sparc/core/
Dtrap_table_mvt.S178 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A8 - AB

12