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/Zephyr-latest/arch/xtensa/core/
Dcrt1.S45 # define ARG5 a10 /* 5th outgoing call argument */
160 * a10 = length of bytes to be zeroed
169 sub a10, a9, a8 /* a10 = length, assumed a multiple of 4 */
170 bbci.l a10, 2, .L1zte
173 .L1zte: bbci.l a10, 3, .L2zte
177 .L2zte: srli a10, a10, 4 /* len is now multiple of 16, divide by 16 */
178 floopnez a10, clearzte
184 floopend a10, clearzte
Dwindow_vectors.S203 s32e a10, a0, -24 /* save a10 to end of call[j]'s stack frame */
236 l32e a10, a11, -24 /* restore a10 from end of call[i]'s stack
Dcoredump.c75 uint32_t a10; member
169 arch_blk.r.a10 = frame->blks[regs_blk_remaining].r2; in arch_coredump_info_dump()
Dthread.c115 frame->a10 = 0; /* a10 */ in init_stack()
Dxtensa_asm2_util.S71 s32i a10, a1, 8
118 l32i a10, a2, 8
Duserspace.S169 mov a10, a8
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Dxtensa.py294 A10 = 99 variable in GdbRegDef_Sample_Controller.RegNum
328 A10 = 167 variable in GdbRegDef_ESP32.RegNum
360 A10 = 165 variable in GdbRegDef_ESP32S2.RegNum
390 A10 = 222 variable in GdbRegDef_ESP32S3.RegNum
431 A10 = 168 variable in GdbRegDef_Intel_Adsp_CAVS_Zephyr.RegNum
471 A10 = 266 variable in GdbRegDef_Intel_Adsp_CAVS_XCC.RegNum
506 A10 = 115 variable in GdbRegDef_DC233C.RegNum
/Zephyr-latest/arch/xtensa/include/
Dxtensa_asm2_context.h59 * - Saved A10 |
191 uintptr_t a10; member
212 uintptr_t a10; member
/Zephyr-latest/doc/connectivity/networking/
Dzephyr_netstack_overview-tx_sequence.svg744 <path d="M0 588.63 A10 10 0 0 1 20 588.63 A10 10 0 1 1 0 588.63 Z" class="st40"/>
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[all …]
Dzephyr_netstack_overview-rx_sequence.svg794 <path d="M0 588.63 A10 10 0 0 1 20 588.63 A10 10 0 1 1 0 588.63 Z" class="st46"/>
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852 <path d="M0 588.63 A10 10 0 0 1 20 588.63 A10 10 0 1 1 0 588.63 Z" class="st47"/>
[all …]
/Zephyr-latest/dts/bindings/gpio/
Dsparkfun-pro-micro-header.yaml30 9 D9/A9 D10/A10 10
/Zephyr-latest/boards/sparkfun/pro_micro_rp2040/
Dsparkfun_pro_micro_connector.dtsi24 , <10 0 &gpio0 21 0> /* D10/A10 */
/Zephyr-latest/boards/adafruit/kb2040/
Dsparkfun_pro_micro_connector.dtsi24 , <10 0 &gpio0 10 0> /* D10/A10 */
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dpower_down_cavs.S43 #define host_base a10
/Zephyr-latest/soc/intel/intel_adsp/ace/
Dpower_down.S37 #define temp_reg4 a10
/Zephyr-latest/tests/drivers/gnss/gnss_parse/src/
Dmain.c44 zassert_equal(gnss_parse_atoi("a10", 10, &value), -EINVAL, in ZTEST()
/Zephyr-latest/dts/arm/renesas/rz/
Drzt2m.dtsi78 prcrn: prcrn@80281a10 {
/Zephyr-latest/boards/96boards/neonkey/doc/
Dindex.rst34 - Temperature/Humidity: SI7034-A10
/Zephyr-latest/dts/xtensa/intel/
Dintel_adsp_cavs25_tgph.dtsi124 mem_window2: mem_window@71a10 {
Dintel_adsp_cavs25.dtsi139 mem_window2: mem_window@71a10 {
/Zephyr-latest/arch/xtensa/core/startup/
Dreset_vector.S414 addi a10, a9, 1 /* set that new bit if... */
415 moveqz a9, a10, a5 /* ... that region is non-cacheable */
/Zephyr-latest/boards/native/doc/
DZephyr_and_bsim.svg143 …<path d="M0 296.7 L0 297.06 L0 300.47 A12.5275 20.044 -180 0 0 10.63 317.48 L62.01 317.48 A10.3705…
/Zephyr-latest/drivers/pinctrl/renesas/rcar/
Dpfc_r8a77951.c86 { RCAR_GP_PIN(1, 10), 4, 3 }, /* A10 */
348 [22] = RCAR_GP_PIN(1, 10), /* A10 */
Dpfc_r8a77961.c86 { RCAR_GP_PIN(1, 10), 4, 3 }, /* A10 */
348 [22] = RCAR_GP_PIN(1, 10), /* A10 */
/Zephyr-latest/soc/espressif/esp32/
Dgdbstub.c742 /* A10 */

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