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/Zephyr-latest/subsys/net/l2/ethernet/lldp/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
15 module-dep = NET_LOG
16 module-str = Log level for LLDP
17 module-help = Enables core LLDP code to output debug messages.
29 (non-fast mode) transmission periods. For further information
34 default 4
56 default 4
64 Subtype 4 = MAC address
68 If subtype 4 is selected, MAC address, then configs
72 if NET_LLDP_CHASSIS_ID_SUBTYPE = 4
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/Zephyr-latest/drivers/flash/
Dspi_nor.h2 * Copyright (c) 2018 Savoir-Faire Linux.
4 * SPDX-License-Identifier: Apache-2.0
27 #define SPI_NOR_CMD_DREAD 0x3B /* Read data (1-1-2) */
28 #define SPI_NOR_CMD_2READ 0xBB /* Read data (1-2-2) */
29 #define SPI_NOR_CMD_QREAD 0x6B /* Read data (1-1-4) */
30 #define SPI_NOR_CMD_4READ 0xEB /* Read data (1-4-4) */
34 #define SPI_NOR_CMD_PP_1_1_2 0xA2 /* Dual Page program (1-1-2) */
35 #define SPI_NOR_CMD_PP_1_1_4 0x32 /* Quad Page program (1-1-4) */
36 #define SPI_NOR_CMD_PP_1_4_4 0x38 /* Quad Page program (1-4-4) */
39 #define SPI_NOR_CMD_SE_4B 0x21 /* Sector erase 4 byte address*/
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DKconfig.npcx_fiu4 # SPDX-License-Identifier: Apache-2.0
36 This option enables the QSPI NOR Flash features such as Quad-Enable,
37 4-byte address support and so on during driver initialization. Disable
53 bool "4 byte address support in Direct Read Access mode"
57 Selected if NPCX series supports 4 byte address mode in Direct Read
61 bool "4 byte address support in Direct Read Access mode"
Djesd216.h4 * SPDX-License-Identifier: Apache-2.0
23 * https://www.jedec.org/standards-documents/docs/jesd216b
35 uint8_t len_dw; /* Length of table in 32-bit DWORDs */
43 return sizeof(uint32_t) * hp->len_dw; in jesd216_param_len()
49 return ((uint16_t)hp->id_msb << 8) | hp->id_lsb; in jesd216_param_id()
57 return ((hp->ptp[2] << 16) in jesd216_param_addr()
58 | (hp->ptp[1] << 8) in jesd216_param_addr()
59 | (hp->ptp[0] << 0)); in jesd216_param_addr()
75 /* The expected value from the jesd216_sfdp::magic field in host byte
80 /* All JESD216 data is read from the device in little-endian byte
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/Zephyr-latest/drivers/ieee802154/
DKconfig.b912 # SPDX-License-Identifier: Apache-2.0
14 int "Telink B91 IEEE 802.15.4 initialization priority"
28 default -50
42 hex "MAC Address Byte 4"
46 This is the byte 4 of the MAC address.
49 hex "MAC Address Byte 5"
53 This is the byte 5 of the MAC address.
56 hex "MAC Address Byte 6"
60 This is the byte 6 of the MAC address.
63 hex "MAC Address Byte 7"
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DKconfig.cc12003 # SPDX-License-Identifier: Apache-2.0
38 hex "MAC Address Byte 4"
42 This is the byte 4 of the MAC address.
45 hex "MAC Address Byte 5"
49 This is the byte 5 of the MAC address.
52 hex "MAC Address Byte 6"
56 This is the byte 6 of the MAC address.
59 hex "MAC Address Byte 7"
63 This is the byte 7 of the MAC address.
76 bool "Use TI CC1200 RF pre-sets"
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DKconfig.uart_pipe2 # SPDX-License-Identifier: Apache-2.0
28 hex "MAC Address Byte 4"
32 This is the byte 4 of the MAC address.
35 hex "MAC Address Byte 5"
39 This is the byte 5 of the MAC address.
42 hex "MAC Address Byte 6"
46 This is the byte 6 of the MAC address.
49 hex "MAC Address Byte 7"
53 This is the byte 7 of the MAC address.
DKconfig.cc25204 # SPDX-License-Identifier: Apache-2.0
39 hex "MAC Address Byte 4"
43 This is the byte 4 of the MAC address.
46 hex "MAC Address Byte 5"
50 This is the byte 5 of the MAC address.
53 hex "MAC Address Byte 6"
57 This is the byte 6 of the MAC address.
60 hex "MAC Address Byte 7"
64 This is the byte 7 of the MAC address.
74 Such feature should not be used for anything but 802.15.4 security.
/Zephyr-latest/dts/bindings/mtd/
Djedec,jesd216.yaml2 # Copyright (c) 2019-2020 Nordic Semiconductor ASA
3 # SPDX-License-Identifier: Apache-2.0
21 jedec-id:
22 type: uint8-array
29 sfdp-bfp:
30 type: uint8-array
32 Contains the 32-bit words in little-endian byte order from the
34 Parameters table. This provides flash-specific configuration
38 quad-enable-requirements:
41 - "NONE"
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Djedec,spi-nor-common.yaml3 # SPDX-License-Identifier: Apache-2.0
5 # Common properties used by nodes describing M25P80-compatible SPI NOR
8 # This extends JESD216-defined features with additional functionality
9 # that may be specific to the vendor of a M25P80-compatible device and
17 requires-ulbpr:
23 protection register that initializes to write-protected. Use this
27 has-dpd:
33 Power-Down mode that is entered by command 0xB9 to reduce power
37 Electronic Signature; see t-enter-dpd).
39 dpd-wakeup-sequence:
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/Zephyr-latest/subsys/net/l2/ieee802154/
Dieee802154_security.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief 802.15.4 6LoWPAN authentication and encryption
26 * @param sec_ctx Pointer to an IEEE 802.15.4 security context.
27 * @param frame Pointer to the frame data in original (little endian) byte order.
31 * @param src_ext_addr Pointer to the extended source address of the frame (in little endian byte
33 * @param frame_counter Frame counter in CPU byte order.
42 * @param sec_ctx Pointer to an IEEE 802.15.4 security context.
43 * @param frame Pointer to the frame data in original (little endian) byte order.
47 * @param src_ext_addr Pointer to the extended source address of the frame (in little endian byte
/Zephyr-latest/arch/arm64/core/
Dearly_mem_funcs.S4 * SPDX-License-Identifier: Apache-2.0
25 /* is dst pointer 8-bytes aligned? */
33 /* spread the byte value across whole 64 bits */
44 2: /* at least one byte to set? */
45 cbz x2, 4f
47 3: /* one byte at a time */
52 4: ret
58 /* are dst and src pointers 8-bytes aligned? */
74 2: /* at least one byte to copy? */
75 cbz x2, 4f
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/Zephyr-latest/lib/crc/
Dcrc32_sw.c4 * SPDX-License-Identifier: Apache-2.0
27 uint8_t byte = data[i]; in crc32_ieee_update() local
29 crc = (crc >> 4) ^ table[(crc ^ byte) & 0x0f]; in crc32_ieee_update()
30 crc = (crc >> 4) ^ table[(crc ^ ((uint32_t)byte >> 4)) & 0x0f]; in crc32_ieee_update()
/Zephyr-latest/dts/bindings/flash_controller/
Dst,stm32-ospi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
9 mx25lm51245: ospi-nor-flash@70000000 {
10 compatible = "st,stm32-ospi-nor";
12 data-mode = <OSPI_OPI_MODE>; /* access on 8 data lines */
13 data-rate = <OSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-ospi-nor"
20 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
22 on-bus: ospi
28 ospi-max-frequency:
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/Zephyr-latest/samples/drivers/lcd_cyclonev_socdk/src/
Dcommands.h2 * SPDX-License-Identifier: Apache-2.0
6 * Reference: https://datasheetspdf.com/pdf-file/746090/Newhaven/NHD-0216K3Z-NSW-BBW/1
12 #define SET_CURSOR 0x45 /*1 byte param in range (0x00 - 0x4F) 2x16 display */
22 #define SET_CONTRAST 0x52 /* 1 byte param in range (1 - 50) 40 default */
23 #define SET_BACKLIGHT 0x53 /* 1 byte param in range (1 - 8) 1 default */
25 #define LD_CUSTOM_CHAR 0x54 /* 9 byte param 1st param: 1-byte */
30 * [addr] 1 byte Custom character address, 0 – 7
34 * Bit 7 6 5 4 3 2 1 0 Hex
47 #define CHGE_RS232_BAUD 0x61 /* 1 byte param in range (1 - 8) */
55 * 4 9600
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/Zephyr-latest/include/zephyr/drivers/
Dsmbus.h4 * SPDX-License-Identifier: Apache-2.0
49 * 0 1 2 3 4 5 6 7 8 9 0
50 * +-+-+-+-+-+-+-+-+-+-+-+
52 * +-+-+-+-+-+-+-+-+-+-+-+
58 * SMBus Byte protocol can send or receive one byte of data.
61 * Byte Write
64 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0
65 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
67 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
69 * Byte Read
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/Zephyr-latest/subsys/modbus/
Dmodbus_server.c4 * SPDX-License-Identifier: Apache-2.0
13 * Copyright 2003-2020 Silicon Laboratories Inc. www.silabs.com
15 * SPDX-License-Identifier: APACHE-2.0
19 * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
37 ctx->mbs_msg_ctr = 0; in modbus_reset_stats()
38 ctx->mbs_crc_err_ctr = 0; in modbus_reset_stats()
39 ctx->mbs_except_ctr = 0; in modbus_reset_stats()
40 ctx->mbs_server_msg_ctr = 0; in modbus_reset_stats()
41 ctx->mbs_noresp_ctr = 0; in modbus_reset_stats()
46 ctx->mbs_msg_ctr++; in update_msg_ctr()
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/Zephyr-latest/soc/nxp/kinetis/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
35 Set this option to use the oscillator in low-power mode.
40 Set this option to use the oscillator in high-gain mode.
60 The resulting frequency must be in the range of 2 MHz to 4 MHz.
77 resulting frequency must be in the range 31.25 kHz to 4 MHz.
94 Include the 16-byte flash configuration field that stores default
105 hex "Flash security byte (FSEC)"
114 hex "Flash nonvolatile option byte (FOPT)"
122 hex "EEPROM protection byte (FEPROT)"
127 devices. For program flash only devices, this byte is reserved.
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/Zephyr-latest/include/zephyr/drivers/i3c/
Dccc.h5 * SPDX-License-Identifier: Apache-2.0
117 /** Enter HDR Mode (HDR-DDR) (Broadcast) */
120 /** Enter HDR Mode 0 (HDR-DDR) (Broadcast) */
123 /** Enter HDR Mode 1 (HDR-TSP) (Broadcast) */
126 /** Enter HDR Mode 2 (HDR-TSL) (Broadcast) */
129 /** Enter HDR Mode 3 (HDR-BT) (Broadcast) */
132 /** Enter HDR Mode 4 (Broadcast) */
171 /** Multi-Lane Data Transfer Control (Broadcast) */
243 * - For Write CCC, pointer to the byte array of data
244 * to be sent, which may contain the Sub-Command Byte
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/Zephyr-latest/soc/microchip/mec/common/reg/
Dmec_global_cfg.h4 * SPDX-License-Identifier: Apache-2.0
14 * Device and Revision ID 32-bit register
16 * b[15:8] = Device Sub-ID
18 * This register can be accesses as bytes or a single 32-bit read from
19 * the EC. Host access byte access via the Host visible configuration
31 /* Byte[0] at offset 0x1c is the 8-bit revision ID */
36 * Byte[1] at offset 0x1D is the 8-bit Sub-ID
38 * bits[7:4] = chip family
47 #define MCHP_GCFG_SUB_ID_PKG_144_PIN 4u
50 #define MCHP_GCFG_SUB_ID_FAM_POS 4u
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/Zephyr-latest/arch/riscv/core/
Dpmp.S4 * SPDX-License-Identifier: Apache-2.0
31 * known (luckily they're all power-of-2's simplifying the code further).
40 slli t1, a0, 4 /* 16-byte instruction blocks */
63 * a1 = (a1 + RV_REGSIZE - 1) / RV_REGSIZE
67 slli t1, a0, 4 /* 16-byte instruction blocks */
69 addi a1, a1, RV_REGSIZE - 1
81 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), t0
92 slli a0, a0, 2 /* 4-byte instruction blocks */
102 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), zero
/Zephyr-latest/include/zephyr/net/
Dieee802154_mgmt.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief IEEE 802.15.4 Management interface public header
11 * @note All references to the standard in this file cite IEEE 802.15.4-2020.
25 * @defgroup ieee802154_mgmt IEEE 802.15.4 Net Management
30 * @brief IEEE 802.15.4 net management library
32 * @details The IEEE 802.15.4 net management library provides runtime
38 * @note All section, table and figure references are to the IEEE 802.15.4-2020
84 * @brief IEEE 802.15.4 net management commands.
86 * @details These IEEE 802.15.4 subsystem net management commands can be called
89 * All attributes and parameters are given in CPU byte order (scalars) or big
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/Zephyr-latest/include/zephyr/drivers/misc/ft8xx/
Dft8xx_common.h4 * SPDX-License-Identifier: Apache-2.0
29 * @brief Write 1 byte (8 bits) to FT8xx memory
32 * @param data Byte to write
45 * @brief Write 4 bytes (32 bits) to FT8xx memory
53 * @brief Read 1 byte (8 bits) from FT8xx memory
71 * @brief Read 4 bytes (32 bits) from FT8xx memory
/Zephyr-latest/drivers/mspi/
DKconfig.ambiq2 # SPDX-License-Identifier: Apache-2.0
18 hex "byte offset to SRAM_BASE_ADDRESS"
24 int "byte alignment of the MSPI buffer"
26 default 4
/Zephyr-latest/drivers/led_strip/
Dtlc5971.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/led/led.h>
43 * The TLC5971 has 4x RGB outputs per device, where each RGB group constitues a pixel from this
46 #define TLC5971_PIXELS_PER_DEVICE 4
57 /** GS reference clock edge select bit for OUTXn on-off timing control in FC data */
60 /** Constant-current output enable bit in FC data (0 = output control enabled, 1 = blank). */
69 /** Bit mask for write cmd in data byte 27 */
72 /** Bit mask for control bits in data byte 27 */
75 /** Bit mask for control bits in data byte 26 */
78 /** Bit mask for global brightness control for color 1 in data byte 26, upper 5 bits of GBC */
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