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/Zephyr-latest/boards/microchip/mec15xxevb_assy6853/
DKconfig.defconfig12 # XEC RTOS timer HW frequency is fixed at 32768
14 # second to be 32768 for accurate operation.
17 default 32768
20 default 32768
/Zephyr-latest/boards/microchip/mec1501modular_assy6885/
DKconfig.defconfig13 # XEC RTOS timer HW frequency is fixed at 32768
15 # second to be 32768 for accurate operation.
18 default 32768
21 default 32768
/Zephyr-latest/boards/microchip/mec172xevb_assy6906/
DKconfig.defconfig8 # XEC RTOS timer HW frequency is fixed at 32768 Hz.
9 # The driver requires tickless mode and ticks per second to be 32768 for
13 default 32768
16 default 32768
/Zephyr-latest/boards/microchip/mec172xmodular_assy6930/
DKconfig.defconfig8 # XEC RTOS timer HW frequency is fixed at 32768 Hz.
9 # The driver requires tickless mode and ticks per second to be 32768 for
13 default 32768
16 default 32768
/Zephyr-latest/soc/ti/simplelink/cc13x2_cc26x2/
DKconfig.defconfig8 default 32768
10 # Note that when using the RTC as system clock, this needs to be 32768
14 default 32768
/Zephyr-latest/soc/ti/simplelink/cc13x2x7_cc26x2x7/
DKconfig.defconfig8 default 32768
10 # Note that when using the RTC as system clock, this needs to be 32768
14 default 32768
/Zephyr-latest/tests/net/lib/lwm2m/lwm2m_registry/src/
Dlwm2m_registry.c12 #define TEST_OBJ_ID 32768
154 zassert_equal(lwm2m_set_bool(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_BOOL), b), 0); in ZTEST()
155 zassert_equal(lwm2m_set_opaque(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_OPAQUE), opaque, l), 0); in ZTEST()
156 zassert_equal(lwm2m_set_string(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_STRING), string), 0); in ZTEST()
157 zassert_equal(lwm2m_set_u8(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_U8), u8), 0); in ZTEST()
158 zassert_equal(lwm2m_set_s8(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_S8), s8), 0); in ZTEST()
159 zassert_equal(lwm2m_set_u16(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_U16), u16), 0); in ZTEST()
160 zassert_equal(lwm2m_set_s16(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_S16), s16), 0); in ZTEST()
161 zassert_equal(lwm2m_set_u32(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_U32), u32), 0); in ZTEST()
162 zassert_equal(lwm2m_set_s32(&LWM2M_OBJ(32768, 0, LWM2M_RES_TYPE_S32), s32), 0); in ZTEST()
[all …]
/Zephyr-latest/tests/subsys/dsp/utils/src/
Dq15.c24 (-32768, 0, -1.0F), (32767, 0, 0.999969482421875F), (32767, 15, 32767.0F), \
25 (-32768, 15, -32768.0F)
28 (-32768, 0, -1), (32767, 0, 0.999969482421875), (32767, 15, 32767.0), (-32768, 15, -32768.0)
/Zephyr-latest/soc/realtek/ec/rts5912/
DKconfig.defconfig.rts591214 default 32768
17 default 32768
/Zephyr-latest/dts/bindings/rtc/
Dmotorola,mc146818.yaml14 default: 32768
18 - 32768
Dnxp,pcf8523.yaml29 default: 32768
31 - 32768
40 Frequency of the CLKOUT signal in Hertz (Hz). Default is 32768 Hz which corresponds to the
Depson,rx8130ce.yaml19 - 32768 # 32 kHz oscillator
20 enum: [1, 1024, 32768]
/Zephyr-latest/soc/snps/nsim/arc_classic/hs/
DCMakeLists.txt42 -Xtimer0 -Xtimer1 -Xrtc -dcache=32768,64,2,a -Hld_cycles=1)
48 -Xtimer0 -Xtimer1 -Xrtc -dcache=32768,64,2,a -Hld_cycles=1)
53 -Xunaligned -Xmpy_cycles=3 -Xtimer0 -Xtimer1 -Xrtc -dcache=32768,64,2,a -Hld_cycles=1)
58 -Xunaligned -Xmpy_cycles=3 -Xtimer0 -Xtimer1 -Xrtc -dcache=32768,64,2,a -Hld_cycles=1)
/Zephyr-latest/tests/kernel/common/src/
Dprintk.c58 char expected_32[] = "22 113 10000 32768 40000 22\n"
59 "p 112 -10000 -32768 -40000 -22\n"
90 char expected_64[] = "22 113 10000 32768 40000 22\n"
91 "p 112 -10000 -32768 -40000 -22\n"
115 char *expected = "22 113 10000 32768 40000 22\n"
116 "p 112 -10000 -32768 -40000 -22\n"
128 char *expected = "22 113 10000 32768 40000 %llu\n"
129 "p 112 -10000 -32768 -40000 %lld\n"
141 char *expected = "22 113 10000 32768 40000 22\n"
142 "p 112 -10000 -32768 -40000 -22\n"
[all …]
/Zephyr-latest/samples/boards/nordic/mesh/onoff_level_lighting_vnd_app/src/mesh/
Dpublisher.h14 #define LEVEL_S0 -32768
22 #define LEVEL_U50 32768
/Zephyr-latest/soc/nordic/
DKconfig.defconfig18 default 32768
23 default 32768
/Zephyr-latest/dts/bindings/clock/
Dsilabs,series2-lfxo.yaml21 enum: [2, 256, 1024, 2048, 4096, 8192, 16384, 32768]
25 Mode of operation. Defaults to "xtal", expecting a 32768 Hz crystal oscillator on XI and XO
/Zephyr-latest/soc/silabs/silabs_s2/
DKconfig.defconfig10 default 32768
14 default 32768 if SILABS_SLEEPTIMER_TIMER
/Zephyr-latest/dts/riscv/starfive/
Djh7110-visionfive-v2.dtsi40 d-cache-size = <32768>;
45 i-cache-size = <32768>;
65 d-cache-size = <32768>;
70 i-cache-size = <32768>;
90 d-cache-size = <32768>;
95 i-cache-size = <32768>;
115 d-cache-size = <32768>;
120 i-cache-size = <32768>;
/Zephyr-latest/boards/snps/nsim/arc_classic/support/
Dmdb_hs5x.args40 -dcache=32768,64,2,a
45 -icache=32768,64,4,a
Dmdb_hs6x.args40 -dcache=32768,64,2,a
45 -icache=32768,64,4,a
Dnsim_hs5x.props48 dcache=32768,64,2,a
53 icache=32768,64,4,a
Dnsim_hs6x.props47 dcache=32768,64,2,a
52 icache=32768,64,4,a
/Zephyr-latest/boards/native/nrf_bsim/
DKconfig.defconfig34 default 32768
39 default 32768
/Zephyr-latest/soc/atmel/sam0/samr21/
Dsoc.h50 #define SOC_ATMEL_SAM0_OSC32K_FREQ_HZ 32768
51 #define SOC_ATMEL_SAM0_XOSC32K_FREQ_HZ 32768
53 #define SOC_ATMEL_SAM0_OSCULP32K_FREQ_HZ 32768

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