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/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dnumaker_m2l31x_reset.h23 #define LPSCC_IPRST0_LPADC0RST_Pos 24
86 #define NUMAKER_PDMA0_RST ((0UL<<24) | SYS_IPRST0_PDMA0RST_Pos)
87 #define NUMAKER_EBI_RST ((0UL<<24) | SYS_IPRST0_EBIRST_Pos)
88 #define NUMAKER_USBH_RST ((0UL<<24) | SYS_IPRST0_USBHRST_Pos)
89 #define NUMAKER_CRC_RST ((0UL<<24) | SYS_IPRST0_CRCRST_Pos)
90 #define NUMAKER_CRPT_RST ((0UL<<24) | SYS_IPRST0_CRPTRST_Pos)
91 #define NUMAKER_CANFD0_RST ((0UL<<24) | SYS_IPRST0_CANFD0RST_Pos)
92 #define NUMAKER_CANFD1_RST ((0UL<<24) | SYS_IPRST0_CANFD1RST_Pos)
94 #define NUMAKER_GPIO_RST ((4UL<<24) | SYS_IPRST1_GPIORST_Pos)
95 #define NUMAKER_TMR0_RST ((4UL<<24) | SYS_IPRST1_TMR0RST_Pos)
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Dnumaker_m46x_reset.h184 #define NUMAKER_PDMA0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_PDMA0RST_Pos)
185 #define NUMAKER_EBI_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_EBIRST_Pos)
186 #define NUMAKER_EMAC0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_EMAC0RST_Pos)
187 #define NUMAKER_SDH0_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_SDH0RST_Pos)
188 #define NUMAKER_CRC_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CRCRST_Pos)
189 #define NUMAKER_CCAP_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CCAPRST_Pos)
190 #define NUMAKER_HSUSBD_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_HSUSBDRST_Pos)
191 #define NUMAKER_HBI_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_HBIRST_Pos)
192 #define NUMAKER_CRPT_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_CRPTRST_Pos)
193 #define NUMAKER_KS_RST ((0UL << 24) | NUMAKER_SYS_IPRST0_KSRST_Pos)
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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-r8a77951.h53 #define PIN_RD_WR RCAR_GP_PIN(1, 24)
131 #define PIN_MLB_SIG RCAR_GP_PIN(5, 24)
157 #define PIN_USB0_PWEN RCAR_GP_PIN(6, 24)
192 #define PIN_QSPI0_IO2 RCAR_NOGP_PIN(24)
232 #define FUNC_IRQ0 IPSR(0, 24, 0)
233 #define FUNC_QPOLB IPSR(0, 24, 1)
234 #define FUNC_DU_CDE IPSR(0, 24, 3)
235 #define FUNC_VI4_DATA0_B IPSR(0, 24, 4)
236 #define FUNC_CAN0_TX_B IPSR(0, 24, 5)
237 #define FUNC_CANFD0_TX_B IPSR(0, 24, 6)
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Dpinctrl-r8a77961.h54 #define PIN_RD_WR RCAR_GP_PIN(1, 24)
132 #define PIN_MLB_SIG RCAR_GP_PIN(5, 24)
158 #define PIN_USB0_PWEN RCAR_GP_PIN(6, 24)
193 #define PIN_QSPI0_IO2 RCAR_NOGP_PIN(24)
232 #define FUNC_IRQ0 IPSR(0, 24, 0)
233 #define FUNC_QPOLB IPSR(0, 24, 1)
234 #define FUNC_DU_CDE IPSR(0, 24, 3)
235 #define FUNC_VI4_DATA0_B IPSR(0, 24, 4)
236 #define FUNC_CAN0_TX_B IPSR(0, 24, 5)
237 #define FUNC_CANFD0_TX_B IPSR(0, 24, 6)
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Dpinctrl-r8a779f0.h58 #define PIN_SD_WP RCAR_GP_PIN(1, 24)
119 #define PIN_MSPI0CSS0 RCAR_GP_PIN(4, 24)
194 #define PIN_CAN12TX RCAR_GP_PIN(7, 24)
224 #define FUNC_RX0 IP0SR0(24, 0)
225 #define FUNC_HRX1 IP0SR0(24, 1)
226 #define FUNC_MSIOF1_RXD IP0SR0(24, 3)
227 #define FUNC_TSN1_AVTP_MATCH_A IP0SR0(24, 5)
254 #define FUNC_MSIOF0_SCK IP1SR0(24, 0)
255 #define FUNC_HSCK3 IP1SR0(24, 1)
256 #define FUNC_SCK1 IP1SR0(24, 2)
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/Zephyr-latest/samples/modules/cmsis_dsp/moving_average/
Dsample.yaml41 - "Input\\[24\\]: 15 16 17 18 19 20 21 22 23 24 | Output\\[24\\]: 19.50"
42 - "Input\\[25\\]: 16 17 18 19 20 21 22 23 24 25 | Output\\[25\\]: 20.50"
43 - "Input\\[26\\]: 17 18 19 20 21 22 23 24 25 26 | Output\\[26\\]: 21.50"
44 - "Input\\[27\\]: 18 19 20 21 22 23 24 25 26 27 | Output\\[27\\]: 22.50"
45 - "Input\\[28\\]: 19 20 21 22 23 24 25 26 27 28 | Output\\[28\\]: 23.50"
46 - "Input\\[29\\]: 20 21 22 23 24 25 26 27 28 29 | Output\\[29\\]: 24.50"
47 - "Input\\[30\\]: 21 22 23 24 25 26 27 28 29 30 | Output\\[30\\]: 25.50"
48 - "Input\\[31\\]: 22 23 24 25 26 27 28 29 30 31 | Output\\[31\\]: 26.50"
/Zephyr-latest/dts/arm/microchip/mec172x/
Dmec172x-vw-routing.dtsi18 vw-girq = <24 0>;
23 vw-girq = <24 1>;
28 vw-girq = <24 2>;
33 vw-girq = <24 4>;
38 vw-girq = <24 5>;
43 vw-girq = <24 6>;
48 vw-girq = <24 8>;
53 vw-girq = <24 9>;
58 vw-girq = <24 10>;
63 vw-girq = <24 12>;
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/Zephyr-latest/dts/bindings/display/
Dnxp,dcnano-lcdif.yaml25 default: "24-bit"
32 - "24-bit" # 24 Bit
34 LCD data bus width. The default is set to the reset value of 24-bit
/Zephyr-latest/include/zephyr/bluetooth/
Dbyteorder.h40 /** @brief Encode 24-bit value into array values in little-endian format.
42 * Helper macro to encode 24-bit values into comma separated values.
46 * @param _v 24-bit integer in host endianness.
48 * @return The comma separated values for the 24-bit value.
66 (((_v) >> 24) & 0xFFU) \
80 BT_BYTES_LIST_LE16((_v) >> 24) \
122 /** @brief Encode 24-bit value into array values in big-endian format.
124 * Helper macro to encode 24-bit values into comma separated values.
128 * @param _v 24-bit integer in host endianness.
130 * @return The comma separated values for the 24-bit value.
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/
Dhse_24.overlay13 clock-frequency = <DT_FREQ_M(24)>; /* 24MHz clock */
19 clock-frequency = <DT_FREQ_M(24)>;
/Zephyr-latest/drivers/sensor/honeywell/mpr/
Dmpr_configuration.h84 #define MPR_OUTPUT_MIN (0x19999A) /* 10% of 2^24 */
85 #define MPR_OUTPUT_MAX (0xE66666) /* 90% of 2^24 */
87 #define MPR_OUTPUT_MIN (0x66666) /* 2.5% of 2^24 */
88 #define MPR_OUTPUT_MAX (0x399999) /* 22.5% of 2^24 */
90 #define MPR_OUTPUT_MIN (0x333333) /* 20% of 2^24 */
91 #define MPR_OUTPUT_MAX (0xCCCCCC) /* 80% of 2^24 */
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dmchp-xec-pinctrl.h37 #define MCHP_XEC_DRV_STR_POS 24
39 #define MCHP_XEC_DRV_STR0_1X 0x1 /* 2 or 4(PIO-24) mA */
40 #define MCHP_XEC_DRV_STR0_2X 0x2 /* 4 or 8(PIO-24) mA */
41 #define MCHP_XEC_DRV_STR0_4X 0x3 /* 8 or 16(PIO-24) mA */
42 #define MCHP_XEC_DRV_STR0_6X 0x4 /* 12 or 24(PIO-24) mA */
/Zephyr-latest/doc/_doxygen/
Ddoxygen-awesome-darkmode-toggle.js34 …24 24" height="24px" viewBox="0 0 24 24" width="24px" fill="#FCBF00"><rect fill="none" height="24"…
35 …e-background="new 0 0 24 24" height="24px" viewBox="0 0 24 24" width="24px" fill="#FE9700"><rect f…
/Zephyr-latest/soc/microchip/mec/common/
Dsoc_pcr.h16 ((((uint32_t)(domain) & 0xff) << 24) | (((bitpos) & 0x1f) << 3) \
35 #define MCHP_XEC_CLK_SRC_POS 24
36 #define MCHP_XEC_CLK_SRC_MASK GENMASK(31, 24)
45 * b[31:24] = clock source
/Zephyr-latest/tests/bsim/bluetooth/audio/test_scripts/
Dcap_unicast_ac_3.sh40 Execute_AC_3 24_1_1 24_1_1
41 Execute_AC_3 24_2_1 24_2_1
Dcap_unicast_ac_5.sh38 Execute_AC_5 24_1_1 24_1_1
39 Execute_AC_5 24_2_1 24_2_1
Dcap_unicast_ac_7_i.sh39 Execute_AC_7_I 24_1_1 24_1_1
40 Execute_AC_7_I 24_2_1 24_2_1
Dcap_broadcast_ac_12.sh40 Execute_AC_12 24_1_1
41 Execute_AC_12 24_2_1
58 Execute_AC_12 24_1_2
59 Execute_AC_12 24_2_2
Dcap_unicast_ac_11_i.sh39 Execute_AC_11_I 24_1_1 24_1_1
40 Execute_AC_11_I 24_2_1 24_2_1
Dcap_unicast_ac_8_i.sh39 Execute_AC_8_I 24_1_1 24_1_1
40 Execute_AC_8_I 24_2_1 24_2_1
Dcap_broadcast_ac_13.sh39 Execute_AC_13 24_1_1
40 Execute_AC_13 24_2_1
57 # Execute_AC_13 24_1_2 # BT_ISO_FLAGS_ERROR
58 # Execute_AC_13 24_2_2 # BT_ISO_FLAGS_ERROR
Dcap_broadcast_ac_14.sh40 Execute_AC_14 24_1_1
41 Execute_AC_14 24_2_1
60 Execute_AC_14 24_1_2
61 Execute_AC_14 24_2_2
/Zephyr-latest/boards/nordic/nrf52840dongle/doc/img/
DnRF52840_dongle_press_reset.svg190 l0.24-0.78L341.31,116.85z"/>
194 l0.24-0.9L478.41,45.39z"/>
198 l0.24-0.9L489.93,131.67z"/>
202 l0.24-0.9L466.89,131.67z"/>
255 … clip-rule="evenodd" d="M212.85,151.89l-0.24,0.36l-0.06,0.06c-0.249,0.514-0.39,0.984-0.42,1.56v0.24
256 …l-0.06,0.18c-0.038,0.676,0.066,1.32,0.12,1.98l0.06,0.06v0.24l0.06,0.24l0.12,0.18l0.06,0.18l0.06,0.…
257 …l0.12,0.18l0.36,0.24h0.06l0.54,0.18l0.24,0.06h0.36l0.24-0.06h0.24l0.36-0.12l0.18-0.12l0.18-0.06l0.…
259 c-0.029-0.812,0.014-2.345,0.96-2.64l0.24-0.06h0.24"/>
261 …l1.62,0.12h0.24l0.36,0.12l0.18,0.12v0.06l0.18,0.12l0.12,0.18v0.12c0.329,0.538,0.065,0.471,0.24,0.9…
282 …l0.18,0.06l0.24,0.12h0.06l0.24,0.06l0.18,0.06h0.24l0.18,0.06c0.56,0.021,1.411-0.12,1.86-0.48l0.12-…
[all …]
/Zephyr-latest/tests/arch/xtensa/save_restore_hifi/src/
Dhifi.S18 ae_s64.i aed3, a2, 24
29 ae_s64.i aed11, a2, 24
48 ae_l64.i aed3, a2, 24
59 ae_l64.i aed11, a2, 24
/Zephyr-latest/dts/common/nordic/
Dnrf54l05.dtsi14 /* 72 + 24 = 96KB */
19 reg = <0x20012000 DT_SIZE_K(24)>;
22 ranges = <0x0 0x20012000 DT_SIZE_K(24)>;

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