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/Zephyr-latest/boards/segger/trb_stm32f407/
Dsegger_trb_stm32f407.dts55 mul-n = <168>;
64 clock-frequency = <DT_FREQ_M(168)>;
/Zephyr-latest/tests/kernel/fpu_sharing/generic/src/
Dfloat_regs_x86_gcc.h55 "fldt 168(%0)\n\t;" in _load_all_float_registers()
99 "fldt 168(%0)\n\t;" in _load_then_store_all_float_registers()
109 "fstpt 168(%0)\n\t;" in _load_then_store_all_float_registers()
146 "fstpt 168(%0)\n\t;" in _store_all_float_registers()
/Zephyr-latest/boards/nuvoton/numaker_m2l31ki/
Dnumaker_m2l31ki.yaml12 ram: 168
Dnumaker_m2l31ki.dts68 reg = <0x20000000 DT_SIZE_K(168)>;
/Zephyr-latest/soc/infineon/cat1a/psoc6_02/
DKconfig.defconfig11 default 168 if CPU_CORTEX_M4
/Zephyr-latest/boards/olimex/stm32_p405/
Dolimex_stm32_p405.dts59 mul-n = <168>;
68 clock-frequency = <DT_FREQ_M(168)>;
/Zephyr-latest/dts/arm/nuvoton/
Dm2l31kid.dtsi13 reg = <0x20000000 DT_SIZE_K(168)>;
/Zephyr-latest/tests/subsys/logging/log_stack/src/
Dmain.c76 #define SIMPLE_USAGE 168
77 #define HEXDUMP_USAGE 168
128 #define SIMPLE_USAGE 168
189 #define HEXDUMP_USAGE 168
249 #define HEXDUMP_USAGE 168
/Zephyr-latest/tests/lib/json/src/
Dmain.c432 [0] = { { .name = "Sim\303\263n Bol\303\255var", .height = 168 } }, in ZTEST()
439 "{\"name\":\"Sim\303\263n Bol\303\255var\",\"height\":168}," in ZTEST()
458 "{\"height\":168,\"name\":\"Sim\303\263n Bol\303\255var\"}," in ZTEST()
475 zassert_equal(obj_array_array_ts.objects_array[0].objects.height, 168, in ZTEST()
493 [0] = { .name = "Sim\303\263n Bol\303\255var", .height = 168 }, in ZTEST()
507 "{\"name\":\"Sim\303\263n Bol\303\255var\",\"height\":168}," in ZTEST()
532 char encoded[] = "[{\"height\":168,\"name\":\"Sim\303\263n Bol\303\255var\"}," in ZTEST()
548 zassert_equal(obj_array_array_ts.elements[0].height, 168, in ZTEST()
566 [0] = { .name = "Sim\303\263n Bol\303\255var", .height = 168 }, in ZTEST()
580 "{\"name\":\"Sim\303\263n Bol\303\255var\",\"height\":168}," in ZTEST()
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/Zephyr-latest/dts/common/nordic/
Dnrf91xx_partition.dtsi76 * - Upper 168 kB SRAM allocated to Non-Secure image (sram0_ns).
93 reg = <0x20016000 DT_SIZE_K(168)>;
/Zephyr-latest/samples/tfm_integration/psa_crypto/boards/
Dnrf9160dk_nrf9160_ns.overlay29 reg = <0x20016000 DT_SIZE_K(168)>;
/Zephyr-latest/samples/tfm_integration/tfm_ipc/boards/
Dnrf9160dk_nrf9160_ns.overlay29 reg = <0x20016000 DT_SIZE_K(168)>;
/Zephyr-latest/dts/bindings/clock/
Dst,stm32f2-pll-clock.yaml17 The PLL output frequency must not exceed 168 MHz.
/Zephyr-latest/tests/arch/arm/arm_thread_swap_tz/boards/
Dnucleo_l552ze_q_stm32l552xx_ns.overlay36 reg = <0x00014000 DT_SIZE_K(168)>;
/Zephyr-latest/boards/st/stm32l562e_dk/
Dstm32l562e_dk_stm32l562xx_ns.dts54 reg = <0x00055000 DT_SIZE_K(168)>;
/Zephyr-latest/soc/nordic/nrf53/
DKconfig64 bool "Workaround for nRF5340 anomaly 168"
67 Indicates that the workaround for the anomaly 168 that affects
77 Indicates that the anomaly 168 workaround is to be extended to cover
/Zephyr-latest/boards/st/st25dv_mb1283_disco/
Dst25dv_mb1283_disco.dts101 mul-n = <168>;
110 clock-frequency = <DT_FREQ_M(168)>;
/Zephyr-latest/arch/arc/
DCMakeLists.txt37 zephyr_compile_options(-Wa,-offwarn=168)
/Zephyr-latest/tests/net/ip-addr/src/
Dmain.c208 TEST_IPV4(192, 168, 0, 1, "192.168.0.1"); in ZTEST()
470 struct in_addr addr4 = { { { 192, 168, 0, 1 } } }; in ZTEST()
471 struct in_addr addr4b = { { { 192, 168, 1, 2 } } }; in ZTEST()
476 struct in_addr match_addr = { { { 192, 168, 0, 2 } } }; in ZTEST()
480 struct in_addr gw = { { { 192, 168, 0, 42 } } }; in ZTEST()
483 struct in_addr bcast_addr2 = { { { 192, 168, 1, 255 } } }; in ZTEST()
484 struct in_addr bcast_addr3 = { { { 192, 168, 255, 255 } } }; in ZTEST()
486 struct in_addr bcast_addr5 = { { { 192, 168, 0, 255 } } }; in ZTEST()
769 .addr = { { { 192, 168, 10, 122 } } }, in ZTEST()
/Zephyr-latest/samples/modules/tflite-micro/magic_wand/renode/
Dangle.data124 -168 158 1110
/Zephyr-latest/boards/olimex/stm32_h405/
Dolimex_stm32_h405.dts68 clock-frequency = <DT_FREQ_M(168)>;
/Zephyr-latest/boards/adafruit/feather_stm32f405/doc/
Dindex.rst15 - STM32F405 Cortex M4 with FPU and 1MB Flash, 168MHz speed
63 a 168MHz system clock.
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Desp32s2-gpio-sigmap.h251 #define ESP_SUBSPID5_IN 168
252 #define ESP_SUBSPID5_OUT 168
/Zephyr-latest/samples/bluetooth/central_hr/
Dprj_minimal.conf61 # sysworkq : STACK: unused 856 usage 168 / 1024 (16 %); CPU: 0 %
/Zephyr-latest/boards/mikroe/mini_m4_for_stm32/
Dmikroe_mini_m4_for_stm32.dts61 clock-frequency = <DT_FREQ_M(168)>;

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