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/Zephyr-latest/tests/lib/cmsis_dsp/filtering/src/
Dmisc_f16.c61 DEFINE_CORRELATE_TEST(4, 11);
66 DEFINE_CORRELATE_TEST(5, 11);
71 DEFINE_CORRELATE_TEST(6, 11);
76 DEFINE_CORRELATE_TEST(9, 11);
81 DEFINE_CORRELATE_TEST(10, 11);
82 DEFINE_CORRELATE_TEST(11, 1);
83 DEFINE_CORRELATE_TEST(11, 2);
84 DEFINE_CORRELATE_TEST(11, 3);
85 DEFINE_CORRELATE_TEST(11, 8);
86 DEFINE_CORRELATE_TEST(11, 11);
[all …]
Dmisc_f32.c69 DEFINE_CORRELATE_TEST(4, 11);
74 DEFINE_CORRELATE_TEST(5, 11);
79 DEFINE_CORRELATE_TEST(6, 11);
84 DEFINE_CORRELATE_TEST(9, 11);
89 DEFINE_CORRELATE_TEST(10, 11);
90 DEFINE_CORRELATE_TEST(11, 1);
91 DEFINE_CORRELATE_TEST(11, 2);
92 DEFINE_CORRELATE_TEST(11, 3);
93 DEFINE_CORRELATE_TEST(11, 8);
94 DEFINE_CORRELATE_TEST(11, 11);
[all …]
Dmisc_q31.c18 #define ABS_ERROR_THRESH_FAST_Q31 ((q31_t)11)
65 DEFINE_CORRELATE_TEST(4, 11);
70 DEFINE_CORRELATE_TEST(5, 11);
75 DEFINE_CORRELATE_TEST(6, 11);
80 DEFINE_CORRELATE_TEST(9, 11);
85 DEFINE_CORRELATE_TEST(10, 11);
86 DEFINE_CORRELATE_TEST(11, 1);
87 DEFINE_CORRELATE_TEST(11, 2);
88 DEFINE_CORRELATE_TEST(11, 3);
89 DEFINE_CORRELATE_TEST(11, 8);
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dambiq-apollo4-pinctrl.h29 #define FPIO_P0 APOLLO4_PINMUX(0, 11)
40 #define FPIO_P1 APOLLO4_PINMUX(1, 11)
52 #define FPIO_P2 APOLLO4_PINMUX(2, 11)
63 #define FPIO_P3 APOLLO4_PINMUX(3, 11)
76 #define FPIO_P4 APOLLO4_PINMUX(4, 11)
91 #define FPIO_P5 APOLLO4_PINMUX(5, 11)
107 #define FPIO_P6 APOLLO4_PINMUX(6, 11)
119 #define FPIO_P7 APOLLO4_PINMUX(7, 11)
129 #define FPIO_P8 APOLLO4_PINMUX(8, 11)
139 #define FPIO_P9 APOLLO4_PINMUX(9, 11)
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/Zephyr-latest/samples/modules/cmsis_dsp/moving_average/
Dsample.yaml28 - "Input\\[11\\]: 2 3 4 5 6 7 8 9 10 11 | Output\\[11\\]: 6.50"
29 - "Input\\[12\\]: 3 4 5 6 7 8 9 10 11 12 | Output\\[12\\]: 7.50"
30 - "Input\\[13\\]: 4 5 6 7 8 9 10 11 12 13 | Output\\[13\\]: 8.50"
31 - "Input\\[14\\]: 5 6 7 8 9 10 11 12 13 14 | Output\\[14\\]: 9.50"
32 - "Input\\[15\\]: 6 7 8 9 10 11 12 13 14 15 | Output\\[15\\]: 10.50"
33 - "Input\\[16\\]: 7 8 9 10 11 12 13 14 15 16 | Output\\[16\\]: 11.50"
34 - "Input\\[17\\]: 8 9 10 11 12 13 14 15 16 17 | Output\\[17\\]: 12.50"
35 - "Input\\[18\\]: 9 10 11 12 13 14 15 16 17 18 | Output\\[18\\]: 13.50"
36 - "Input\\[19\\]: 10 11 12 13 14 15 16 17 18 19 | Output\\[19\\]: 14.50"
37 - "Input\\[20\\]: 11 12 13 14 15 16 17 18 19 20 | Output\\[20\\]: 15.50"
/Zephyr-latest/tests/lib/cmsis_dsp/statistics/src/
Dq31.c39 DEFINE_TEST_VARIANT3(statistics_q31, arm_max_q31, 11, in_com1, 2, 11);
60 DEFINE_TEST_VARIANT3(statistics_q31, arm_min_q31, 11, in_com1, 2, 11);
81 DEFINE_TEST_VARIANT3(statistics_q31, arm_absmax_q31, 11, in_absminmax, 2, 11);
102 DEFINE_TEST_VARIANT3(statistics_q31, arm_absmin_q31, 11, in_absminmax, 2, 11);
135 DEFINE_TEST_VARIANT3(statistics_q31, arm_mean_q31, 11, in_com2, 2, 11);
168 DEFINE_TEST_VARIANT3(statistics_q31, arm_power_q31, 11, in_com1, 2, 11);
201 DEFINE_TEST_VARIANT3(statistics_q31, arm_rms_q31, 11, in_com1, 2, 11);
234 DEFINE_TEST_VARIANT3(statistics_q31, arm_std_q31, 11, in_com1, 2, 11);
267 DEFINE_TEST_VARIANT3(statistics_q31, arm_var_q31, 11, in_com1, 2, 11);
Df32.c38 DEFINE_TEST_VARIANT3(statistics_f32, arm_max_f32, 11, in_com1, 2, 11);
55 DEFINE_TEST_VARIANT3(statistics_f32, arm_max_no_idx_f32, 11, in_com1, 2, 11);
76 DEFINE_TEST_VARIANT3(statistics_f32, arm_min_f32, 11, in_com1, 2, 11);
97 DEFINE_TEST_VARIANT3(statistics_f32, arm_absmax_f32, 11, in_absminmax, 2, 11);
118 DEFINE_TEST_VARIANT3(statistics_f32, arm_absmin_f32, 11, in_absminmax, 2, 11);
151 DEFINE_TEST_VARIANT3(statistics_f32, arm_mean_f32, 11, in_com2, 2, 11);
184 DEFINE_TEST_VARIANT3(statistics_f32, arm_power_f32, 11, in_com1, 2, 11);
217 DEFINE_TEST_VARIANT3(statistics_f32, arm_rms_f32, 11, in_com1, 2, 11);
250 DEFINE_TEST_VARIANT3(statistics_f32, arm_std_f32, 11, in_com1, 2, 11);
283 DEFINE_TEST_VARIANT3(statistics_f32, arm_var_f32, 11, in_com1, 2, 11);
/Zephyr-latest/tests/drivers/can/api/src/
Dcommon.h33 * @brief Standard (11-bit) CAN IDs and masks used for testing.
61 * @brief Standard (11-bit) CAN ID frame 1.
66 * @brief Standard (11-bit) CAN ID frame 2.
81 * @brief Standard (11-bit) CAN ID RTR frame 1.
92 * @brief Standard (11-bit) CAN ID frame 1 with CAN FD payload.
97 * @brief Standard (11-bit) CAN ID frame 2 with CAN FD payload.
103 * @brief Standard (11-bit) CAN ID filter 1. This filter matches
109 * @brief Standard (11-bit) CAN ID filter 2. This filter matches
115 * @brief Standard (11-bit) CAN ID masked filter 1. This filter matches
121 * @brief Standard (11-bit) CAN ID masked filter 2. This filter matches
[all …]
Dcommon.c26 * @brief Standard (11-bit) CAN ID frame 1.
36 * @brief Standard (11-bit) CAN ID frame 2.
66 * @brief Standard (11-bit) CAN ID RTR frame 1.
87 * @brief Standard (11-bit) CAN ID frame 1 with CAN FD payload.
93 .data = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
101 * @brief Standard (11-bit) CAN ID frame 1 with CAN FD payload.
107 .data = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
116 * @brief Standard (11-bit) CAN ID filter 1. This filter matches
126 * @brief Standard (11-bit) CAN ID filter 2. This filter matches
136 * @brief Standard (11-bit) CAN ID masked filter 1. This filter matches
[all …]
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Dx86.py30 SS = 11
50 IV_SEGMENT_NOT_PRESENT = 11
78 ExceptionVectors.IV_COPROC_SEGMENT_OVERRUN: 11,
79 ExceptionVectors.IV_INVALID_TSS: 11,
80 ExceptionVectors.IV_SEGMENT_NOT_PRESENT: 11,
81 ExceptionVectors.IV_STACK_FAULT: 11,
82 ExceptionVectors.IV_GENERAL_PROTECTION: 11,
83 ExceptionVectors.IV_PAGE_FAULT: 11,
117 self.registers[RegNum.EFLAGS] = tu[11]
Dx86_64.py30 R11 = 11
61 IV_SEGMENT_NOT_PRESENT = 11
87 ExceptionVectors.IV_COPROC_SEGMENT_OVERRUN: 11,
88 ExceptionVectors.IV_INVALID_TSS: 11,
89 ExceptionVectors.IV_SEGMENT_NOT_PRESENT: 11,
90 ExceptionVectors.IV_STACK_FAULT: 11,
91 ExceptionVectors.IV_GENERAL_PROTECTION: 11,
92 ExceptionVectors.IV_PAGE_FAULT: 11,
145 self.registers[RegNum.R11] = tu[11]
/Zephyr-latest/tests/lib/cmsis_dsp/support/src/
Df32.c44 DEFINE_TEST_VARIANT2(support_f32, arm_copy_f32, 11, in_f32, 11);
71 DEFINE_TEST_VARIANT1(support_f32, arm_fill_f32, 11, 11);
96 DEFINE_TEST_VARIANT3(support_f32, arm_float_to_q31, 11, in_f32, ref_q31, 11);
175 DEFINE_TEST_VARIANT2(support_f32, arm_weighted_average_f32, 11, 2, 11);
212 in_sort, ref_sort, 11,
216 in_sort, ref_sort, 11,
220 in_sort, ref_sort, 11,
224 in_sort, ref_sort, 11,
228 in_sort, ref_sort, 11,
263 DEFINE_TEST_VARIANT4(support_f32, arm_merge_sort_out, 11,
[all …]
/Zephyr-latest/tests/lib/cmsis_dsp/complexmath/src/
Df32.c54 DEFINE_TEST_VARIANT3(complexmath_f32, arm_cmplx_conj_f32, 11, in_com1, ref_conj, 11);
90 DEFINE_TEST_VARIANT4(complexmath_f32, arm_cmplx_dot_prod_f32, 11, in_com1, in_com2,
91 ref_dot_prod_4n1, 11);
122 DEFINE_TEST_VARIANT3(complexmath_f32, arm_cmplx_mag_f32, 11, in_com1, ref_mag, 11);
153 DEFINE_TEST_VARIANT3(complexmath_f32, arm_cmplx_mag_squared_f32, 11, in_com1, ref_mag_squared, 11);
192 DEFINE_TEST_VARIANT4(complexmath_f32, arm_cmplx_mult_cmplx_f32, 11, in_com1, in_com2,
193 ref_mult_cmplx, 11);
234 DEFINE_TEST_VARIANT4(complexmath_f32, arm_cmplx_mult_real_f32, 11, in_com1, in_com3, ref_mult_real,
235 11);
Dq31.c54 DEFINE_TEST_VARIANT3(complexmath_q31, arm_cmplx_conj_q31, 11, in_com1, ref_conj, 11);
86 DEFINE_TEST_VARIANT4(complexmath_q31, arm_cmplx_dot_prod_q31, 11, in_com1, in_com2,
87 ref_dot_prod_4n1, 11);
116 DEFINE_TEST_VARIANT3(complexmath_q31, arm_cmplx_mag_q31, 11, in_com1, ref_mag, 11);
145 DEFINE_TEST_VARIANT3(complexmath_q31, arm_cmplx_mag_squared_q31, 11, in_com1, ref_mag_squared, 11);
182 DEFINE_TEST_VARIANT4(complexmath_q31, arm_cmplx_mult_cmplx_q31, 11, in_com1, in_com2,
183 ref_mult_cmplx, 11);
220 DEFINE_TEST_VARIANT4(complexmath_q31, arm_cmplx_mult_real_q31, 11, in_com1, in_com3, ref_mult_real,
221 11);
/Zephyr-latest/dts/arm/st/g0/
Dstm32g050.dtsi36 interrupts = <9 0 10 0 10 0 11 0 11 0 11 0 11 0>;
/Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/
Dfrdm_ke17z512.overlay27 * PTB14(J3-11) ---> PTE11(J2-11)
33 pwms = <&ftm0 2 0 PWM_POLARITY_NORMAL>, /* PTB14 J3 pin 11 */
34 <&pwt 1 0 PWM_POLARITY_NORMAL>; /* PTE11 J2 pin 11 */
/Zephyr-latest/boards/renesas/ek_ra8d1/
Dek_ra8d1-pinctrl.dtsi23 <RA_PSEL(RA_PSEL_SPI, 4, 11)>,
52 psels = <RA_PSEL(RA_PSEL_I2C, 5, 12)>,<RA_PSEL(RA_PSEL_I2C, 5, 11)>;
76 psels = <RA_PSEL(RA_PSEL_USBHS, 11, 1)>; /* USBHS-VBUS */
122 <RA_PSEL(RA_PSEL_BUS, 3, 11)>,
144 <RA_PSEL(RA_PSEL_BUS, 6, 11)>,
199 <RA_PSEL(RA_PSEL_GLCDC, 9, 11)>,
213 <RA_PSEL(RA_PSEL_GLCDC, 7, 11)>,
223 <RA_PSEL(RA_PSEL_GLCDC, 11, 7)>,
225 <RA_PSEL(RA_PSEL_GLCDC, 11, 6)>,
227 <RA_PSEL(RA_PSEL_GLCDC, 11, 5)>,
[all …]
/Zephyr-latest/tests/subsys/display/cfb/basic/src/
Ddraw_rect.c58 zassert_true(verify_image_and_bg(0, 0, rectspace1123, 11, 23, 0), ""); in ZTEST()
69 zassert_true(verify_image_and_bg(1, 1, rectspace1123, 11, 23, 0), ""); in ZTEST()
81 zassert_true(verify_image_and_bg(9, 15, rectspace1123, 11, 23, 0), ""); in ZTEST()
92 zassert_true(verify_image_and_bg(10, 16, rectspace1123, 11, 23, 0), ""); in ZTEST()
97 struct cfb_position start = {11, 17}; in ZTEST()
103 zassert_true(verify_image_and_bg(11, 17, rectspace1123, 11, 23, 0), ""); in ZTEST()
111 struct cfb_position start = {-(11 - 3), -(23 - 4)}; in ZTEST()
146 struct cfb_position start = {-(11 - 3), display_height - 14}; in ZTEST()
/Zephyr-latest/tests/subsys/dsp/basicmath/src/
Dq31.c47 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_add_q31, 11, in_com1, in_com2, ref_add, 11);
81 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_add_q31_in_place, 11, in_com1, in_com2, ref_add, 11);
116 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_sub_q31, 11, in_com1, in_com2, ref_sub, 11);
150 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_sub_q31_in_place, 11, in_com1, in_com2, ref_sub, 11);
185 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_mult_q31, 11, in_com1, in_com2, ref_mult, 11);
219 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_mult_q31_in_place, 11, in_com1, in_com2, ref_mult, 11);
251 DEFINE_TEST_VARIANT3(basic_math_q31, zdsp_negate_q31, 11, in_com1, ref_negate, 11);
284 DEFINE_TEST_VARIANT3(basic_math_q31, zdsp_negate_q31_in_place, 11, in_com1, ref_negate, 11);
317 DEFINE_TEST_VARIANT4(basic_math_q31, zdsp_offset_q31, 0p5_11, in_com1, 0x40000000, ref_offset, 11);
356 ref_offset, 11);
[all …]
Df32.c48 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_add_f32, 11, in_com1, in_com2, ref_add, 11);
80 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_add_f32_in_place, 11, in_com1, in_com2, ref_add, 11);
113 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_sub_f32, 11, in_com1, in_com2, ref_sub, 11);
145 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_sub_f32_in_place, 11, in_com1, in_com2, ref_sub, 11);
178 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_mult_f32, 11, in_com1, in_com2, ref_mult, 11);
210 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_mult_f32_in_place, 11, in_com1, in_com2, ref_mult, 11);
243 DEFINE_TEST_VARIANT3(basic_math_f32, zdsp_negate_f32, 11, in_com1, ref_negate, 11);
275 DEFINE_TEST_VARIANT3(basic_math_f32, zdsp_negate_f32_in_place, 11, in_com1, ref_negate, 11);
308 DEFINE_TEST_VARIANT4(basic_math_f32, zdsp_offset_f32, 0p5_11, in_com1, 0.5f, ref_offset, 11);
341 11);
[all …]
/Zephyr-latest/soc/microchip/mec/common/reg/
Dmec_tach.h38 #define MCHP_TACH_CTRL_NUM_EDGES_POS 11
40 #define MCHP_TACH_CTRL_NUM_EDGES_MASK SHLU32(0x03U, 11)
42 #define MCHP_TACH_CTRL_EDGES_3 SHLU32(1u, 11)
43 #define MCHP_TACH_CTRL_EDGES_5 SHLU32(2u, 11)
44 #define MCHP_TACH_CTRL_EDGES_9 SHLU32(3u, 11)
/Zephyr-latest/dts/bindings/sensor/
Dti,ina219.yaml63 2 = 11 bit -> 276 µs
67 11 = 12 bit - 8 sample averaging -> 4.26 ms
87 - 11
99 2 = 11 bit -> 276 µs
103 11 = 12 bit - 8 sample averaging -> 4.26 ms
123 - 11
/Zephyr-latest/drivers/can/
DKconfig.stm3218 int "Maximum number of standard (11-bit) ID filters"
22 Defines the maximum number of filters with standard ID (11-bit)
62 int "Maximum number of standard (11-bit) ID filters"
66 Defines the maximum number of filters with standard ID (11-bit)
/Zephyr-latest/dts/bindings/misc/
Dnordic,split-channels.yaml13 owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
14 child-owned-channels = <7 8 9 10 11>;
16 Which means that channels 0-11 will be assigned to the particular CPU.
19 7-11 only by child subprocessor. If the CPU you're configuring has no
/Zephyr-latest/dts/arm/st/u0/
Dstm32u073.dtsi40 interrupts = <11 0 11 0 11 0 11 0 11 0>;

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