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/Zephyr-latest/modules/hal_nordic/nrfs/dvfs/
DKconfig25 range 1 10000000
31 range 1 10000000
/Zephyr-latest/boards/qemu/riscv32_xip/
Dqemu_riscv32_xip_defconfig8 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
/Zephyr-latest/boards/qemu/xtensa/
Dqemu_xtensa_dc233c_defconfig5 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
Dqemu_xtensa_dc233c_mmu_defconfig5 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
Dqemu_xtensa_sample_controller32_mpu_defconfig5 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
Dqemu_xtensa_dc233c.dts21 clock-frequency = <10000000>;
Dqemu_xtensa_dc233c_mmu.dts21 clock-frequency = <10000000>;
Dqemu_xtensa_sample_controller32_mpu.dts21 clock-frequency = <10000000>;
/Zephyr-latest/boards/qemu/arc/
Dqemu_arc.dtsi52 clock-frequency = <10000000>;
62 clock-frequency = <10000000>;
/Zephyr-latest/tests/drivers/pwm/pwm_api/boards/
Dnative_sim.overlay12 frequency = <10000000>;
/Zephyr-latest/soc/qemu/virt_riscv/
DKconfig.defconfig8 default 10000000
/Zephyr-latest/boards/cdns/xt-sim/
Dxt-sim.dts20 clock-frequency = <10000000>;
/Zephyr-latest/boards/sifive/hifive_unmatched/support/
Dhifive_unmatched.resc14 frequency: 10000000
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc11u66.dtsi11 sram0: memory@10000000 {
Dnxp_lpc11u67.dtsi11 sram0: memory@10000000 {
Dnxp_lpc11u68.dtsi11 sram0: memory@10000000 {
/Zephyr-latest/soc/snps/qemu_arc/
DKconfig.defconfig7 default 10000000
/Zephyr-latest/boards/sifive/hifive_unleashed/support/
Dhifive_unleashed.resc17 frequency: 10000000
/Zephyr-latest/boards/shields/mikroe_eth_click/
Dmikroe_eth_click.overlay14 spi-max-frequency = <10000000>;
/Zephyr-latest/dts/arm/st/l4/
Dstm32l471Xg.dtsi14 sram1: memory@10000000 {
Dstm32l475Xe.dtsi13 sram1: memory@10000000 {
Dstm32l475Xg.dtsi13 sram1: memory@10000000 {
Dstm32l476Xg.dtsi13 sram1: memory@10000000 {
Dstm32l486Xg.dtsi14 sram1: memory@10000000 {
Dstm32l496Xe.dtsi13 sram1: memory@10000000 {

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