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/Zephyr-latest/.github/workflows/
Dcodecov.yaml5 - cron: '25 06,18 * * *'
8 group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
9 cancel-in-progress: true
13 if: github.repository_owner == 'zephyrproject-rtos'
14 runs-on:
15 group: zephyr-runner-v2-linux-x64-4xlarge
17 image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
18 options: '--entrypoint /bin/bash'
20 fail-fast: false
24 - platform: 'mps2/an385'
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/Zephyr-latest/scripts/pylib/twister/twisterlib/
Dcoverage.py3 # Copyright (c) 2018-2022 Intel Corporation
4 # SPDX-License-Identifier: Apache-2.0
72 hex_dump = sp[1][:-1]
100 # Iteratively call gcov-tool (not gcov) to merge the files
101 merge_tool = self.gcov_tool + '-tool'
102 for d1, d2 in zip(dirs[:-1], dirs[1:], strict=False):
103 cmd = [merge_tool, 'merge', d1, d2, '--output', d2]
107 with open(f'{dirs[-1]}/tmp.gcda', 'rb') as fp:
108 return fp.read(-1).hex()
117 filename = (filename[:-4]) + "gcno"
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Drunner.py3 # Copyright (c) 2018-2024 Intel Corporation
5 # SPDX-License-Identifier: Apache-2.0
74 completed = done - filtered_static
77 pass rate = passed / (total - filtered_configs)
78 case pass rate = passed_cases / (cases - filtered_cases - skipped_cases)
147 length = int(log10(-n))+2
151 selected_cases = self.cases - self.filtered_cases
152 selected_configs = self.done - self.filtered_static - self.filtered_runtime
507 config_re = re.compile('(CONFIG_[A-Za-z0-9_]+)[=]\"?([^\"]*)\"?$')
508 dt_re = re.compile('([A-Za-z0-9_]+)[=]\"?([^\"]*)\"?$')
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/Zephyr-latest/cmake/modules/
Dextensions.cmake1 # SPDX-License-Identifier: Apache-2.0
14 # 1. Zephyr-aware extensions
21 # 2. Kconfig-aware extensions
23 # 3. CMake-generic extensions
34 # 5. Zephyr linker functions
38 # 7.1 llext_* configuration functions
39 # 7.2 add_llext_* build control functions
40 # 7.3 llext helper functions
41 # 8. Script mode handling
44 # 1. Zephyr-aware extensions
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/Zephyr-latest/include/zephyr/drivers/
Di2c.h10 * SPDX-License-Identifier: Apache-2.0
65 /** Use 10-bit addressing. DEPRECATED - Use I2C_MSG_ADDR_10_BITS instead. */
160 * that follows a write, or vice-versa. Some drivers will merge
165 /** Use 10-bit addressing for this message.
199 * @param result Result code of the transfer request. 0 is success, -errno for failure.
271 /** Target device responds to 10-bit addressing. */
438 * i2c_target_unregister() functions to indicate addition and removal
455 /** Callback functions */
470 return device_is_ready(spec->bus); in i2c_is_ready_dt()
482 return (msg->flags & I2C_MSG_READ) == I2C_MSG_READ; in i2c_is_read_op()
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Di3c.h5 * SPDX-License-Identifier: Apache-2.0
42 * - BCR[7:6]: Device Role
43 * - 0: I3C Target
44 * - 1: I3C Controller capable
45 * - 2: Reserved
46 * - 3: Reserved
48 * - BCR[5]: Advanced Capabilities
49 * - 0: Does not support optional advanced capabilities.
50 * - 1: Supports optional advanced capabilities which
53 * - BCR[4]: Virtual Target Support
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/Zephyr-latest/include/zephyr/xen/public/
Darch-arm.h1 /* SPDX-License-Identifier: MIT */
4 * arch-arm.h
11 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
42 * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2,
47 * is an inter-procedure-call scratch register (e.g. for use in linker
61 * EABI) and Procedure Call Standard for the ARM 64-bit Architecture
62 * (AAPCS64). Where there is a conflict the 64-bit standard should be
68 * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable.
70 * - hypercall arguments passed via a pointer to guest memory.
71 * - memory shared via the grant table mechanism (including PV I/O
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/Zephyr-latest/doc/releases/
Drelease-notes-1.13.rst16 * Support for IEEE 802.1AS-2011 generalized Precision Time Protocol (gPTP)
23 * Basic support for Arm TrustZone in Armv8-M
33 * Fix errno access for user mode
42 * arch: arm: implement ARMv8-M MPU driver
44 * arch: arm: macro API for defining non-secure entry functions
48 * arch: ARM: Change the march used by cortex-m0 and cortex-m0plus
50 * arch: arm: basic Arm TrustZone-M functionality for Cortex-M23 and Cortex-M33
51 * arch: arm: built-in stack protection using Armv8-M SPLIM registers
52 * arch: arm: API for using TT intrinsics in Secure/Non-Secure Armv8-M firmware
63 * riscv32: riscv-privilege: Microsemi Mi-V support
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Drelease-notes-2.2.rst18 * Fix CVE-2020-10028
19 * Fix CVE-2020-10060
20 * Fix CVE-2020-10063
21 * Fix CVE-2020-10066
32 * :github:`23494` - Bluetooth: LL/PAC/SLA/BV-01-C fails if Slave-initiated Feature Exchange is disa…
33 * :github:`23485` - BT: host: Service Change indication sent regardless of whether it is needed or …
34 * :github:`23482` - 2M PHY + DLE and timing calculations on an encrypted link are wrong
35 * :github:`23070` - Bluetooth: controller: Fix ticker implementation to avoid catch up
36 * :github:`22967` - Bluetooth: controller: ASSERTION FAIL on invalid packet sequence
37 * :github:`24183` - [v2.2] Bluetooth: controller: split: Regression slave latency during connection…
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Drelease-notes-1.14.rst17 * CVE-2020-10066
18 * CVE-2020-10069
19 * CVE-2020-13601
20 * CVE-2020-13602
32 * :github:`issuenumber` - issue title
34 * :github:`18334` - DNS resolution is broken for some addresses in master/2.0-pre
35 * :github:`19917` - Bluetooth: Controller: Missing LL_ENC_RSP after HCI LTK Negative Reply
36 * :github:`21107` - LL_ASSERT and 'Imprecise data bus error' in LL Controller
37 * :github:`21257` - tests/net/net_pkt failed on mimxrt1050_evk board.
38 * :github:`21299` - bluetooth: Controller does not release buffer on central side after peripheral …
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Drelease-notes-2.3.rst18 with future support for features like 64-bit and absolute timeouts in mind
21 * Zephyr now integrates with the TF-M (Trusted Firmware M) PSA-compliant
24 * The CMSIS-DSP library is now included and integrated
33 * CVE-2020-10022: UpdateHub Module Copies a Variable-Sized Hash String
34 into a fixed-size array.
35 * CVE-2020-10059: UpdateHub Module Explicitly Disables TLS
37 * CVE-2020-10061: Improper handling of the full-buffer case in the
39 * CVE-2020-10062: Packet length decoding error in MQTT
40 * CVE-2020-10063: Remote Denial of Service in CoAP Option Parsing Due
42 * CVE-2020-10068: In the Zephyr project Bluetooth subsystem, certain
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Drelease-notes-1.10.rst12 * Initial alpha-quality thread-level memory protection on x86, userspace and memory
27 * Initial alpha-quality thread-level memory protection on x86, userspace and memory
30 * Same kernel & driver APIs for kernel and user mode threads
35 * Memory domain APIs for fine-tuning memory region permissions
38 * Add the following application-facing memory domain APIs:
40 * k_mem_domain_init() - to initialize a memory domain
41 * k_mem_domain_destroy() - to destroy a memory domain
42 * k_mem_domain_add_partition() - to add a partition into a domain
43 * k_mem_domain_remove_partition() - to remove a partition from a domain
44 * k_mem_domain_add_thread() - to add a thread into a domain
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Drelease-notes-2.0.rst12 * The kernel now supports both 32- and 64-bit architectures.
17 * We added support for :ref:`Point-to-Point Protocol (PPP) <ppp>`. PPP is a
20 * We added support for UpdateHub, an end-to-end solution for large scale
21 over-the-air device updates.
22 * We added support for ARM Cortex-R Architecture (Experimental).
32 * Fixes CVE-2019-9506: The Bluetooth BR/EDR specification up to and
35 negotiation. This allows practical brute-force attacks (aka "KNOB")
42 * New kernel API for per-thread disabling of Floating Point Services for
43 ARC, ARM Cortex-M, and x86 architectures.
45 * Additional support for compatibility with 64-bit architectures.
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Drelease-notes-2.6.rst13 * Added support for 64-bit ARCv3
14 * Split ARM32 and ARM64, ARM64 is now a top-level architecture
15 * Added initial support for Arm v8.1-m and Cortex-M55
22 https://github.com/zephyrproject-rtos/example-application
34 * CVE-2021-3581: Under embargo until 2021-09-04
41 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
46 * Driver APIs now return ``-ENOSYS`` if optional functions are not implemented.
47 If the feature is not supported by the hardware ``-ENOTSUP`` will be returned.
48 Formerly ``-ENOTSUP`` was returned for both failure modes, meaning this change
128 * The following functions, macros, and structures related to the kernel
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Drelease-notes-2.7.rst17 * Support for M-Profile Vector Extensions (MVE) on ARMv8.1-M
18 * Improved thread safety for Newlib and C++ on SMP-capable systems
20 * New Action-based Power Management API
23 * Linker Support for Tightly-Coupled Memory in RISC-V
25 * Support for extended PCI / PCIe capabilities, improved MIS-X support
33 * The kernel now supports both 32- and 64-bit architectures
36 * We added support for Point-to-Point Protocol (PPP)
37 * We added support for UpdateHub, an end-to-end solution for over-the-air device updates
38 * We added support for ARM Cortex-R Architecture
40 * Expanded support for ARMv6-M architecture
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/Zephyr-latest/drivers/spi/
Dspi_andes_atcspi200.c4 * SPDX-License-Identifier: Apache-2.0
57 /* API Functions */
61 const struct spi_atcspi200_cfg * const cfg = dev->config; in spi_config()
65 sclk_div = (cfg->f_sys / (config->frequency << 1)) - 1; in spi_config()
66 sys_clear_bits(SPI_TIMIN(cfg->base), TIMIN_SCLK_DIV_MSK); in spi_config()
67 sys_set_bits(SPI_TIMIN(cfg->base), sclk_div); in spi_config()
69 /* Set Master mode */ in spi_config()
70 sys_clear_bits(SPI_TFMAT(cfg->base), TFMAT_SLVMODE_MSK); in spi_config()
72 /* Disable data merge mode */ in spi_config()
73 sys_clear_bits(SPI_TFMAT(cfg->base), TFMAT_DATA_MERGE_MSK); in spi_config()
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/Zephyr-latest/scripts/kconfig/
Dkconfiglib.py1 # Copyright (c) 2011-2019, Ulf Magnusson
2 # SPDX-License-Identifier: ISC
9 from Kconfig (https://www.kernel.org/doc/Documentation/kbuild/kconfig-language.txt)
27 $ wget -qO- https://raw.githubusercontent.com/ulfalizer/Kconfiglib/master/makefile.patch | git am
28 …$ wget -qO- https://raw.githubusercontent.com/ulfalizer/Kconfiglib/master/makefile.patch | patch -…
30 Warning: Not passing -p1 to patch will cause the wrong file to be patched.
43 $ git am Kconfiglib/makefile.patch (or 'patch -p1 < Kconfiglib/makefile.patch')
53 ----------------
61 --------------
69 --------------------------------
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/Zephyr-latest/boards/arm/v2m_musca_b1/doc/
Dindex.rst10 on the V2M Musca B1 board. It provides support for the Musca B1 ARM Cortex-M33
13 - Nested Vectored Interrupt Controller (NVIC)
14 - System Tick System Clock (SYSTICK)
15 - Cortex-M System Design Kit GPIO
16 - Cortex-M System Design Kit UART
31 - ARM Cortex-M33
32 - ARM IoT Subsystem for Cortex-M33
33 - Memory
35 - 512KB on-chip system memory SRAM.
36 - 8MB of external QSPI flash.
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/Zephyr-latest/boards/arm/mps2/doc/
Dmps2_an521.rst10 on the MPS2+ AN521 board. It provides support for the MPS2+ AN521 ARM Cortex-M33
13 - Nested Vectored Interrupt Controller (NVIC)
14 - System Tick System Clock (SYSTICK)
15 - Cortex-M System Design Kit GPIO
16 - Cortex-M System Design Kit UART
31 for use with QEMU and unit tests for the ARM Cortex-M33.
37 The MPS2+ AN521 is a dual core SoC with Cortex-M33 architecture on both cores
40 both Secure and Non-Secure firmware images may be built.
44 +----------------------+-------------------------------------------------------+
47 | mps2/an521/cpu0 | For building Secure (or Secure-only) firmware on CPU0 |
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/Zephyr-latest/boards/arm/v2m_musca_s1/doc/
Dindex.rst3 ARM V2M Musca-S1
10 on the V2M Musca-S1 board. It provides support for the Musca-S1 ARM Cortex-M33
13 - Nested Vectored Interrupt Controller (NVIC)
14 - System Tick System Clock (SYSTICK)
15 - Cortex-M System Design Kit GPIO
16 - Cortex-M System Design Kit UART
20 :alt: ARM V2M Musca-S1
22 More information about the board can be found at the `V2M Musca-S1 Website`_.
27 ARM V2M MUSCA-S1 provides the following hardware components:
29 - ARM Cortex-M33 (with FPU and DSP)
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