| /hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/ |
| D | fsl_msmc.c | 21 uint32_t reg; in SMC_SetPowerModeRun() local
34 uint32_t reg; in SMC_SetPowerModeHsrun() local
59 uint32_t reg; in SMC_SetPowerModeStop() local
93 uint32_t reg; in SMC_SetPowerModeVlpr() local
119 uint32_t reg; in SMC_SetPowerModeVlps() local
153 uint32_t reg; in SMC_SetPowerModeLls() local
190 uint32_t reg; in SMC_SetPowerModeVlls0() local
214 uint32_t reg; in SMC_SetPowerModeVlls2() local
238 uint32_t reg; in SMC_SetPowerModeVlls() local
279 uint32_t reg; in SMC_ConfigureResetPinFilter() local
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| D | fsl_clock.c | 50 #define PCC_PCS_VAL(reg) ((reg & PCC_CLKCFG_PCS_MASK) >> PCC_CLKCFG_PCS_SHIFT) argument
51 #define PCC_FRAC_VAL(reg) ((reg & PCC_CLKCFG_FRAC_MASK) >> PCC_CLKCFG_FRAC_SHIFT) argument
52 #define PCC_PCD_VAL(reg) ((reg & PCC_CLKCFG_PCD_MASK) >> PCC_CLKCFG_PCD_SHIFT) argument
196 uint32_t reg = (*(volatile uint32_t *)name); in CLOCK_GetIpFreq() local
361 uint32_t reg = SCG->SOSCCSR; in CLOCK_DeinitSysOsc() local
462 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc() local
585 uint32_t reg = SCG->FIRCCSR; in CLOCK_DeinitFirc() local
731 uint32_t reg = SCG->LPFLLCSR; in CLOCK_DeinitLpFll() local
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| D | fsl_mu.h | 256 uint32_t reg = base->CR; in MU_SetFlagsNonBlocking() local
399 uint32_t reg = base->CR; in MU_EnableInterrupts() local
420 uint32_t reg = base->CR; in MU_DisableInterrupts() local
538 uint32_t reg = base->CR; in MU_ResetBothSides() local
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| D | fsl_lptmr.h | 179 uint32_t reg = base->CSR; in LPTMR_EnableInterrupts() local
196 uint32_t reg = base->CSR; in LPTMR_DisableInterrupts() local
335 uint32_t reg = base->CSR; in LPTMR_StartTimer() local
352 uint32_t reg = base->CSR; in LPTMR_StopTimer() local
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| D | fsl_llwu.c | 17 uint32_t reg; in LLWU_SetExternalWakeupPinMode() local
303 uint32_t reg; in LLWU_ClearPinFilterFlag() local
372 uint8_t reg; in LLWU_SetResetPinMode() local
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| D | fsl_mu.c | 92 uint32_t reg = base->CR; in MU_TriggerInterrupts() local
116 uint32_t reg = base->CCR; in MU_BootCoreB() local
122 uint32_t reg = base->CR; in MU_BootCoreB() local
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| D | fsl_clock.h | 822 uint32_t reg = (*(volatile uint32_t *)name); in CLOCK_SetIpSrc() local
853 uint32_t reg = (*(volatile uint32_t *)name); in CLOCK_SetIpSrcDiv() local
1134 uint32_t reg = SCG->SOSCDIV; in CLOCK_SetSysOscAsyncClkDiv() local
1195 uint32_t reg = SCG->SOSCCSR; in CLOCK_SetSysOscMonitorMode() local
1260 uint32_t reg = SCG->SIRCDIV; in CLOCK_SetSircAsyncClkDiv() local
1348 uint32_t reg = SCG->FIRCDIV; in CLOCK_SetFircAsyncClkDiv() local
1445 uint32_t reg = SCG->ROSCCSR; in CLOCK_SetRtcOscMonitorMode() local
1508 uint32_t reg = SCG->LPFLLDIV; in CLOCK_SetLpFllAsyncClkDiv() local
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| D | fsl_tpm.c | 396 uint32_t reg = base->CONTROLS[chnlNumber].CnSC & ~(TPM_CnSC_CHF_MASK); in TPM_UpdateChnlEdgeLevelSelect() local
519 uint32_t reg; in TPM_SetupDualEdgeCapture() local
618 uint32_t reg; in TPM_SetupQuadDecode() local
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| D | fsl_xrdc.h | 635 uint32_t reg = base->PID[master]; in XRDC_SetPidLockMode() local
923 uint32_t reg = base->MRGD[mem].MRGD_W[3]; in XRDC_SetMemAccessLockMode() local
1124 uint32_t reg = base->PDAC_W[periph][1]; in XRDC_SetPeriphAccessLockMode() local
1165 uint32_t reg = base->PDAC_W[periph][1] & ~XRDC_PDAC_W_EAL_MASK; in XRDC_SetPeriphAccessValid() local
1202 uint32_t reg = base->PDAC_W[periph][1]; in XRDC_SetPeriphExclAccessLockMode() local
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| D | fsl_cau3.c | 2193 static void cau3_pkha_write_word(CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t index, uint32_t… in cau3_pkha_write_word()
2222 static uint32_t cau3_pkha_read_word(CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t index) in cau3_pkha_read_word()
2251 CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t quad, const uint8_t *data, size_t dataSize) in cau3_pkha_write_reg()
2277 static void cau3_pkha_read_reg(CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t quad, uint8_t *da… in cau3_pkha_read_reg()
2369 static void cau3_pkha_mode_set_src_reg_copy(cau3_mode_t *outMode, cau3_pkha_reg_area_t reg) in cau3_pkha_mode_set_src_reg_copy()
2387 static void cau3_pkha_mode_set_dst_reg_copy(cau3_mode_t *outMode, cau3_pkha_reg_area_t reg) in cau3_pkha_mode_set_dst_reg_copy()
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| D | fsl_lpit.c | 117 uint32_t reg = 0; in LPIT_SetupChannel() local
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| D | fsl_cau3_ble.c | 2388 static void cau3_pkha_write_word(CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t index, uint32_t… in cau3_pkha_write_word()
2417 static uint32_t cau3_pkha_read_word(CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t index) in cau3_pkha_read_word()
2446 CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t quad, const uint8_t *data, size_t dataSize) in cau3_pkha_write_reg()
2472 static void cau3_pkha_read_reg(CAU3_Type *base, cau3_pkha_reg_area_t reg, uint8_t quad, uint8_t *da… in cau3_pkha_read_reg()
2564 static void cau3_pkha_mode_set_src_reg_copy(cau3_mode_t *outMode, cau3_pkha_reg_area_t reg) in cau3_pkha_mode_set_src_reg_copy()
2582 static void cau3_pkha_mode_set_dst_reg_copy(cau3_mode_t *outMode, cau3_pkha_reg_area_t reg) in cau3_pkha_mode_set_dst_reg_copy()
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| D | fsl_rtc.c | 190 uint32_t reg; in RTC_Init() local
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| D | fsl_xrdc.c | 322 uint32_t reg = base->MRGD[mem].MRGD_W[4]; in XRDC_SetMemExclAccessLockMode() local
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| D | fsl_rtc.h | 389 uint32_t reg = base->CR; in RTC_SetOscCapLoad() local
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| D | fsl_tpm.h | 559 uint32_t reg = base->SC; in TPM_StartTimer() local
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