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/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/include/
DRegLockMacros.h97 #define RLM_REG_BIT_CLEAR8(address, mask) ((*(volatile uint8*)(address))&= (~(mask))) argument
101 #define RLM_REG_BIT_CLEAR16(address, mask) ((*(volatile uint16*)(address))&= (~(mask))) argument
105 #define RLM_REG_BIT_CLEAR32(address, mask) ((*(volatile uint32*)(address))&= (~(mask))) argument
111 #define RLM_REG_BIT_GET8(address, mask) ((*(volatile uint8*)(address))& (mask)) argument
115 #define RLM_REG_BIT_GET16(address, mask) ((*(volatile uint16*)(address))& (mask)) argument
119 #define RLM_REG_BIT_GET32(address, mask) ((*(volatile uint32*)(address))& (mask)) argument
125 #define RLM_REG_BIT_SET8(address, mask) ((*(volatile uint8*)(address))|= (mask)) argument
129 #define RLM_REG_BIT_SET16(address, mask) ((*(volatile uint16*)(address))|= (mask)) argument
133 #define RLM_REG_BIT_SET32(address, mask) ((*(volatile uint32*)(address))|= (mask)) argument
141 #define RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& … argument
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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/include/
DRegLockMacros.h97 #define RLM_REG_BIT_CLEAR8(address, mask) ((*(volatile uint8*)(address))&= (~(mask))) argument
101 #define RLM_REG_BIT_CLEAR16(address, mask) ((*(volatile uint16*)(address))&= (~(mask))) argument
105 #define RLM_REG_BIT_CLEAR32(address, mask) ((*(volatile uint32*)(address))&= (~(mask))) argument
111 #define RLM_REG_BIT_GET8(address, mask) ((*(volatile uint8*)(address))& (mask)) argument
115 #define RLM_REG_BIT_GET16(address, mask) ((*(volatile uint16*)(address))& (mask)) argument
119 #define RLM_REG_BIT_GET32(address, mask) ((*(volatile uint32*)(address))& (mask)) argument
125 #define RLM_REG_BIT_SET8(address, mask) ((*(volatile uint8*)(address))|= (mask)) argument
129 #define RLM_REG_BIT_SET16(address, mask) ((*(volatile uint16*)(address))|= (mask)) argument
133 #define RLM_REG_BIT_SET32(address, mask) ((*(volatile uint32*)(address))|= (mask)) argument
141 #define RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& … argument
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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/include/
DRegLockMacros.h96 #define RLM_REG_BIT_CLEAR8(address, mask) ((*(volatile uint8*)(address))&= (~(mask))) argument
100 #define RLM_REG_BIT_CLEAR16(address, mask) ((*(volatile uint16*)(address))&= (~(mask))) argument
104 #define RLM_REG_BIT_CLEAR32(address, mask) ((*(volatile uint32*)(address))&= (~(mask))) argument
110 #define RLM_REG_BIT_GET8(address, mask) ((*(volatile uint8*)(address))& (mask)) argument
114 #define RLM_REG_BIT_GET16(address, mask) ((*(volatile uint16*)(address))& (mask)) argument
118 #define RLM_REG_BIT_GET32(address, mask) ((*(volatile uint32*)(address))& (mask)) argument
124 #define RLM_REG_BIT_SET8(address, mask) ((*(volatile uint8*)(address))|= (mask)) argument
128 #define RLM_REG_BIT_SET16(address, mask) ((*(volatile uint16*)(address))|= (mask)) argument
132 #define RLM_REG_BIT_SET32(address, mask) ((*(volatile uint32*)(address))|= (mask)) argument
140 #define RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& … argument
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/hal_nxp-latest/mcux/mcux-sdk/drivers/gpio/
Dfsl_gpio.h197 static inline void GPIO_SecurePrivilegeLock(GPIO_Type *base, gpio_pin_interrupt_control_t mask) in GPIO_SecurePrivilegeLock()
208 static inline void GPIO_EnablePinControlNonSecure(GPIO_Type *base, uint32_t mask) in GPIO_EnablePinControlNonSecure()
219 static inline void GPIO_DisablePinControlNonSecure(GPIO_Type *base, uint32_t mask) in GPIO_DisablePinControlNonSecure()
230 static inline void GPIO_EnablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask) in GPIO_EnablePinControlNonPrivilege()
241 static inline void GPIO_DisablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask) in GPIO_DisablePinControlNonPrivilege()
252 static inline void GPIO_EnableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask) in GPIO_EnableInterruptControlNonSecure()
263 static inline void GPIO_DisableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask) in GPIO_DisableInterruptControlNonSecure()
274 static inline void GPIO_EnableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask) in GPIO_EnableInterruptControlNonPrivilege()
285 static inline void GPIO_DisableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask) in GPIO_DisableInterruptControlNonPrivilege()
298 static inline void GPIO_PortInputEnable(GPIO_Type *base, uint32_t mask) in GPIO_PortInputEnable()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/rgpio/
Dfsl_rgpio.h199 static inline void RGPIO_PortSet(RGPIO_Type *base, uint32_t mask) in RGPIO_PortSet()
208 static inline void RGPIO_SetPinsOutput(RGPIO_Type *base, uint32_t mask) in RGPIO_SetPinsOutput()
219 static inline void RGPIO_PortClear(RGPIO_Type *base, uint32_t mask) in RGPIO_PortClear()
231 static inline void RGPIO_ClearPinsOutput(RGPIO_Type *base, uint32_t mask) in RGPIO_ClearPinsOutput()
242 static inline void RGPIO_PortToggle(RGPIO_Type *base, uint32_t mask) in RGPIO_PortToggle()
251 static inline void RGPIO_TogglePinsOutput(RGPIO_Type *base, uint32_t mask) in RGPIO_TogglePinsOutput()
289 static inline void RGPIO_EnablePortInput(RGPIO_Type *base, uint32_t mask, bool enable) in RGPIO_EnablePortInput()
344 static inline void RGPIO_ClearPinsInterruptFlags(RGPIO_Type *base, uint32_t mask) in RGPIO_ClearPinsInterruptFlags()
390 uint32_t mask, in _SetMultipleInterruptPinsConfig()
433 …line void RGPIO_ClearPinsInterruptFlags(RGPIO_Type *base, rgpio_interrupt_sel_t sel, uint32_t mask) in RGPIO_ClearPinsInterruptFlags()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/igpio/
Dfsl_gpio.h112 static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask) in GPIO_PortSet()
125 static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask) in GPIO_SetPinsOutput()
136 static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask) in GPIO_PortClear()
149 static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask) in GPIO_ClearPinsOutput()
160 static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask) in GPIO_PortToggle()
253 static inline void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t mask) in GPIO_PortEnableInterrupts()
264 static inline void GPIO_EnableInterrupts(GPIO_Type *base, uint32_t mask) in GPIO_EnableInterrupts()
275 static inline void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t mask) in GPIO_PortDisableInterrupts()
284 static inline void GPIO_DisableInterrupts(GPIO_Type *base, uint32_t mask) in GPIO_DisableInterrupts()
318 static inline void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask) in GPIO_PortClearInterruptFlags()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_power.c372 void POWER_EnableLPRequestMask(uint32_t mask) in POWER_EnableLPRequestMask()
377 void POWER_DisableLPRequestMask(uint32_t mask) in POWER_DisableLPRequestMask()
399 void POWER_EnableRunAFBB(uint32_t mask) in POWER_EnableRunAFBB()
406 void POWER_EnableRunRBB(uint32_t mask) in POWER_EnableRunRBB()
412 void POWER_EnableSleepRBB(uint32_t mask) in POWER_EnableSleepRBB()
419 void POWER_EnableRunNBB(uint32_t mask) in POWER_EnableRunNBB()
425 void POWER_EnableSleepNBB(uint32_t mask) in POWER_EnableSleepNBB()
647 void POWER_ResetIOBank(uint32_t mask) in POWER_ResetIOBank()
656 void POWER_IOBankIsolationHold(uint32_t mask) in POWER_IOBankIsolationHold()
666 void POWER_IOBankClearIsolationHold(uint32_t mask) in POWER_IOBankClearIsolationHold()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_power.c372 void POWER_EnableLPRequestMask(uint32_t mask) in POWER_EnableLPRequestMask()
377 void POWER_DisableLPRequestMask(uint32_t mask) in POWER_DisableLPRequestMask()
399 void POWER_EnableRunAFBB(uint32_t mask) in POWER_EnableRunAFBB()
406 void POWER_EnableRunRBB(uint32_t mask) in POWER_EnableRunRBB()
412 void POWER_EnableSleepRBB(uint32_t mask) in POWER_EnableSleepRBB()
419 void POWER_EnableRunNBB(uint32_t mask) in POWER_EnableRunNBB()
425 void POWER_EnableSleepNBB(uint32_t mask) in POWER_EnableSleepNBB()
647 void POWER_ResetIOBank(uint32_t mask) in POWER_ResetIOBank()
656 void POWER_IOBankIsolationHold(uint32_t mask) in POWER_IOBankIsolationHold()
666 void POWER_IOBankClearIsolationHold(uint32_t mask) in POWER_IOBankClearIsolationHold()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_power.c372 void POWER_EnableLPRequestMask(uint32_t mask) in POWER_EnableLPRequestMask()
377 void POWER_DisableLPRequestMask(uint32_t mask) in POWER_DisableLPRequestMask()
399 void POWER_EnableRunAFBB(uint32_t mask) in POWER_EnableRunAFBB()
406 void POWER_EnableRunRBB(uint32_t mask) in POWER_EnableRunRBB()
412 void POWER_EnableSleepRBB(uint32_t mask) in POWER_EnableSleepRBB()
419 void POWER_EnableRunNBB(uint32_t mask) in POWER_EnableRunNBB()
425 void POWER_EnableSleepNBB(uint32_t mask) in POWER_EnableSleepNBB()
647 void POWER_ResetIOBank(uint32_t mask) in POWER_ResetIOBank()
656 void POWER_IOBankIsolationHold(uint32_t mask) in POWER_IOBankIsolationHold()
666 void POWER_IOBankClearIsolationHold(uint32_t mask) in POWER_IOBankClearIsolationHold()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/tdet/
Dfsl_tdet.c47 static bool tdet_IsRegisterWriteAllowed(DIGTMP_Type *base, uint32_t mask) in tdet_IsRegisterWriteAllowed()
65 uint32_t mask; in tdet_PinConfigure() local
308 uint32_t mask; in TDET_ActiveTamperSetConfig() local
389 uint32_t mask; in TDET_PinSetConfig() local
457 status_t TDET_ClearStatusFlags(DIGTMP_Type *base, uint32_t mask) in TDET_ClearStatusFlags()
484 status_t TDET_EnableInterrupts(DIGTMP_Type *base, uint32_t mask) in TDET_EnableInterrupts()
512 status_t TDET_DisableInterrupts(DIGTMP_Type *base, uint32_t mask) in TDET_DisableInterrupts()
540 status_t TDET_EnableTampers(DIGTMP_Type *base, uint32_t mask) in TDET_EnableTampers()
568 status_t TDET_DisableTampers(DIGTMP_Type *base, uint32_t mask) in TDET_DisableTampers()
652 void TDET_LockRegisters(DIGTMP_Type *base, uint32_t mask) in TDET_LockRegisters()
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexio/
Dfsl_flexio.h557 static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_EnableShifterStatusInterrupts()
570 static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_DisableShifterStatusInterrupts()
583 static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_EnableShifterErrorInterrupts()
596 static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_DisableShifterErrorInterrupts()
609 static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_EnableTimerStatusInterrupts()
622 static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_DisableTimerStatusInterrupts()
653 static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask) in FLEXIO_ClearShifterStatusFlags()
677 static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask) in FLEXIO_ClearShifterErrorFlags()
701 static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask) in FLEXIO_ClearTimerStatusFlags()
723 static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable) in FLEXIO_EnableShifterStatusDMA()
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/hal_nxp-latest/s32/drivers/s32ze/Can_CANEXCEL/src/
DCanEXCEL_Ip_HwAccess.c706 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigAccAddr() local
726 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigIDFilter() local
746 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigSDUFilter() local
774 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigVCANFilter() local
802 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigAccAddrFilterBank() local
846 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigAccAddrRejectBank() local
889 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigSDUFilterBank() local
942 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigSDURejectBank() local
995 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigVCANFilterBank() local
1048 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigVCANRejectBank() local
/hal_nxp-latest/mcux/mcux-sdk/drivers/trng/
Dfsl_trng.c209 #define TRNG_RMW_SCML(base, mask, value) (TRNG_WR_SCML(base, (TRNG_RD_SCML(base) & ~(mask)) | (valu… argument
269 #define TRNG_RMW_SCR1L(base, mask, value) (TRNG_WR_SCR1L(base, (TRNG_RD_SCR1L(base) & ~(mask)) | (v… argument
332 #define TRNG_RMW_SCR2L(base, mask, value) (TRNG_WR_SCR2L(base, (TRNG_RD_SCR2L(base) & ~(mask)) | (v… argument
399 #define TRNG_RMW_SCR3L(base, mask, value) (TRNG_WR_SCR3L(base, (TRNG_RD_SCR3L(base) & ~(mask)) | (v… argument
467 #define TRNG_RMW_SCR4L(base, mask, value) (TRNG_WR_SCR4L(base, (TRNG_RD_SCR4L(base) & ~(mask)) | (v… argument
536 #define TRNG_RMW_SCR5L(base, mask, value) (TRNG_WR_SCR5L(base, (TRNG_RD_SCR5L(base) & ~(mask)) | (v… argument
605 #define TRNG_RMW_SCR6PL(base, mask, value) (TRNG_WR_SCR6PL(base, (TRNG_RD_SCR6PL(base) & ~(mask)) |… argument
672 #define TRNG_RMW_PKRMAX(base, mask, value) (TRNG_WR_PKRMAX(base, (TRNG_RD_PKRMAX(base) & ~(mask)) |… argument
722 #define TRNG_RMW_PKRRNG(base, mask, value) (TRNG_WR_PKRRNG(base, (TRNG_RD_PKRRNG(base) & ~(mask)) |… argument
772 #define TRNG_RMW_FRQMAX(base, mask, value) (TRNG_WR_FRQMAX(base, (TRNG_RD_FRQMAX(base) & ~(mask)) |… argument
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4_extension.h147 #define ADC_RMW_SC1(base, index, mask, value) (ADC_WR_SC1(base, index, (ADC_RD_SC1(base, index) & ~… argument
328 #define ADC_RMW_CFG1(base, mask, value) (ADC_WR_CFG1(base, (ADC_RD_CFG1(base) & ~(mask)) | (value))) argument
476 #define ADC_RMW_CFG2(base, mask, value) (ADC_WR_CFG2(base, (ADC_RD_CFG2(base) & ~(mask)) | (value))) argument
665 #define ADC_RMW_CV1(base, mask, value) (ADC_WR_CV1(base, (ADC_RD_CV1(base) & ~(mask)) | (value))) argument
712 #define ADC_RMW_CV2(base, mask, value) (ADC_WR_CV2(base, (ADC_RD_CV2(base) & ~(mask)) | (value))) argument
754 #define ADC_RMW_SC2(base, mask, value) (ADC_WR_SC2(base, (ADC_RD_SC2(base) & ~(mask)) | (value))) argument
931 #define ADC_RMW_SC3(base, mask, value) (ADC_WR_SC3(base, (ADC_RD_SC3(base) & ~(mask)) | (value))) argument
1090 #define ADC_RMW_OFS(base, mask, value) (ADC_WR_OFS(base, (ADC_RD_OFS(base) & ~(mask)) | (value))) argument
1142 #define ADC_RMW_PG(base, mask, value) (ADC_WR_PG(base, (ADC_RD_PG(base) & ~(mask)) | (value))) argument
1192 #define ADC_RMW_MG(base, mask, value) (ADC_WR_MG(base, (ADC_RD_MG(base) & ~(mask)) | (value))) argument
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/hal_nxp-latest/mcux/mcux-sdk/drivers/eeprom/
Dfsl_eeprom.h138 static inline void EEPROM_EnableInterrupt(EEPROM_Type *base, uint32_t mask) in EEPROM_EnableInterrupt()
150 static inline void EEPROM_DisableInterrupt(EEPROM_Type *base, uint32_t mask) in EEPROM_DisableInterrupt()
175 static inline void EEPROM_ClearInterruptFlag(EEPROM_Type *base, uint32_t mask) in EEPROM_ClearInterruptFlag()
201 static inline void EEPROM_SetInterruptFlag(EEPROM_Type *base, uint32_t mask) in EEPROM_SetInterruptFlag()
266 static inline void EEPROM_SetEccErrorCount(EEPROM_Type *base, uint32_t mask) in EEPROM_SetEccErrorCount()
279 static inline void EEPROM_SetCheckStartAddress(EEPROM_Type *base, uint32_t mask) in EEPROM_SetCheckStartAddress()
291 static inline void EEPROM_SetCheckStopAddress(EEPROM_Type *base, uint32_t mask) in EEPROM_SetCheckStopAddress()
/hal_nxp-latest/mcux/mcux-sdk/drivers/gpio_1/
Dfsl_gpio.c139 void GPIO_PortSet(gpio_port_num_t port, uint8_t mask) in GPIO_PortSet()
158 void GPIO_PortClear(gpio_port_num_t port, uint8_t mask) in GPIO_PortClear()
177 void GPIO_PortToggle(gpio_port_num_t port, uint8_t mask) in GPIO_PortToggle()
335 void FGPIO_PortSet(gpio_port_num_t port, uint8_t mask) in FGPIO_PortSet()
354 void FGPIO_PortClear(gpio_port_num_t port, uint8_t mask) in FGPIO_PortClear()
373 void FGPIO_PortToggle(gpio_port_num_t port, uint8_t mask) in FGPIO_PortToggle()
/hal_nxp-latest/mcux/mcux-sdk/drivers/sdu/
Dcis_table.c192 uint32_t mask; in modify() local
204 static uint32_t modify2(uint32_t tmp, uint32_t mask, uint32_t shift, uint32_t val) in modify2()
215 void rmw2(volatile uint32_t *addr, uint32_t mask, uint32_t shift, uint32_t val) in rmw2()
225 static uint32_t extract2(uint32_t data, uint32_t mask, uint32_t shift) in extract2()
235 static uint32_t rd2(volatile uint32_t *addr, uint32_t mask, uint32_t shift) in rd2()
244 uint32_t mask; in set_iomux_helper() local
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_io_mux.h49 #define IO_MUX_SGPIO_FLAG(mask) (((uint32_t)(mask) >> 17) & 1UL) argument
50 #define IO_MUX_GPIO_FLAG(mask) (((uint32_t)(mask) >> 16) & 1UL) argument
51 #define IO_MUX_FC_OFFSET(mask) (((uint32_t)(mask) >> 12) & 0xFUL) argument
52 #define IO_MUX_FC_MASK(mask) ((uint32_t)(mask)&0x7FFUL) argument
55 #define IO_MUX_CTIMER_IN_MASK(mask) ((uint32_t)(mask)&0x7FFFUL) argument
56 #define IO_MUX_CTIMER_OUT_MASK(mask) (((uint32_t)(mask) >> 16) & 0x7FFFUL) argument
1729 uint32_t mask, shift; in IO_MUX_SetPinOutLevelInSleep() local
1780 uint32_t mask; in IO_MUX_SetRfPinOutLevelInSleep() local
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_io_mux.h49 #define IO_MUX_SGPIO_FLAG(mask) (((uint32_t)(mask) >> 17) & 1UL) argument
50 #define IO_MUX_GPIO_FLAG(mask) (((uint32_t)(mask) >> 16) & 1UL) argument
51 #define IO_MUX_FC_OFFSET(mask) (((uint32_t)(mask) >> 12) & 0xFUL) argument
52 #define IO_MUX_FC_MASK(mask) ((uint32_t)(mask)&0x7FFUL) argument
55 #define IO_MUX_CTIMER_IN_MASK(mask) ((uint32_t)(mask)&0x7FFFUL) argument
56 #define IO_MUX_CTIMER_OUT_MASK(mask) (((uint32_t)(mask) >> 16) & 0x7FFFUL) argument
1729 uint32_t mask, shift; in IO_MUX_SetPinOutLevelInSleep() local
1780 uint32_t mask; in IO_MUX_SetRfPinOutLevelInSleep() local
/hal_nxp-latest/mcux/mcux-sdk/drivers/acmp/
Dfsl_acmp.c470 void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask) in ACMP_SetRoundRobinPreState()
487 void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask) in ACMP_ClearRoundRobinStatusFlags()
503 void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask) in ACMP_EnableInterrupts()
542 void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask) in ACMP_DisableInterrupts()
611 void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask) in ACMP_ClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/rtc_1/
Dfsl_rtc.h233 static inline void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask) in RTC_EnableInterrupts()
245 static inline void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask) in RTC_DisableInterrupts()
283 static inline void RTC_ClearInterruptFlags(RTC_Type *base, uint32_t mask) in RTC_ClearInterruptFlags()
303 static inline void RTC_EnableOutput(RTC_Type *base, uint32_t mask) in RTC_EnableOutput()
315 static inline void RTC_DisableOutput(RTC_Type *base, uint32_t mask) in RTC_DisableOutput()
/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.h856 static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask) in SAI_TxClearStatusFlags()
881 static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask) in SAI_RxClearStatusFlags()
1059 static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask) in SAI_TxEnableInterrupts()
1076 static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask) in SAI_RxEnableInterrupts()
1093 static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask) in SAI_TxDisableInterrupts()
1110 static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask) in SAI_RxDisableInterrupts()
1131 static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable) in SAI_TxEnableDMA()
1152 static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable) in SAI_RxEnableDMA()
/hal_nxp-latest/mcux/mcux-sdk/drivers/pdm/
Dfsl_pdm.h657 static inline void PDM_ClearStatus(PDM_Type *base, uint32_t mask) in PDM_ClearStatus()
668 static inline void PDM_ClearFIFOStatus(PDM_Type *base, uint32_t mask) in PDM_ClearFIFOStatus()
680 static inline void PDM_ClearRangeStatus(PDM_Type *base, uint32_t mask) in PDM_ClearRangeStatus()
691 static inline void PDM_ClearOutputStatus(PDM_Type *base, uint32_t mask) in PDM_ClearOutputStatus()
724 static inline void PDM_DisableInterrupts(PDM_Type *base, uint32_t mask) in PDM_DisableInterrupts()
908 static inline void PDM_EnableHwvadInterrupts(PDM_Type *base, uint32_t mask) in PDM_EnableHwvadInterrupts()
922 static inline void PDM_DisableHwvadInterrupts(PDM_Type *base, uint32_t mask) in PDM_DisableHwvadInterrupts()
933 static inline void PDM_ClearHwvadInterruptStatusFlags(PDM_Type *base, uint32_t mask) in PDM_ClearHwvadInterruptStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_1/
Dfsl_qtmr.c318 void QTMR_EnableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_EnableInterrupts()
364 void QTMR_DisableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_DisableInterrupts()
500 void QTMR_ClearStatusFlags(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_ClearStatusFlags()
607 void QTMR_EnableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_EnableDma()
640 void QTMR_DisableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_DisableDma()
/hal_nxp-latest/mcux/mcux-sdk/drivers/vbat/
Dfsl_vbat.h432 static inline void VBAT_ClearStatusFlags(VBAT_Type *base, uint32_t mask) in VBAT_ClearStatusFlags()
443 static inline void VBAT_EnableInterrupts(VBAT_Type *base, uint32_t mask) in VBAT_EnableInterrupts()
454 static inline void VBAT_DisableInterrupts(VBAT_Type *base, uint32_t mask) in VBAT_DisableInterrupts()
465 static inline void VBAT_EnableWakeup(VBAT_Type *base, uint32_t mask) in VBAT_EnableWakeup()
476 static inline void VBAT_DisableWakeup(VBAT_Type *base, uint32_t mask) in VBAT_DisableWakeup()

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