1/*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <nordic/nrf_common.dtsi>
9#include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10#include <zephyr/dt-bindings/regulator/nrf5x.h>
11
12/delete-node/ &sw_pwm;
13
14/* Domain IDs. Can be used to specify channel links in IPCT nodes. */
15#define NRF_DOMAIN_ID_APPLICATION 0
16#define NRF_DOMAIN_ID_FLPR 1
17
18/ {
19	#address-cells = <1>;
20	#size-cells = <1>;
21
22	cpus {
23		#address-cells = <1>;
24		#size-cells = <0>;
25
26		cpuapp: cpu@0 {
27			compatible = "arm,cortex-m33f";
28			reg = <0>;
29			device_type = "cpu";
30			clocks = <&hfpll>;
31			#address-cells = <1>;
32			#size-cells = <1>;
33
34			itm: itm@e0000000 {
35				compatible = "arm,armv8m-itm";
36				reg = <0xe0000000 0x1000>;
37				swo-ref-frequency = <DT_FREQ_M(128)>;
38			};
39		};
40
41		cpuflpr: cpu@1 {
42			compatible = "nordic,vpr";
43			reg = <1>;
44			device_type = "cpu";
45			clocks = <&hfpll>;
46			riscv,isa = "rv32emc";
47			nordic,bus-width = <32>;
48		};
49	};
50
51	clocks {
52		pclk: pclk {
53			compatible = "fixed-clock";
54			#clock-cells = <0>;
55			clock-frequency = <DT_FREQ_M(16)>;
56		};
57
58		lfxo: lfxo {
59			compatible = "nordic,nrf-lfxo";
60			#clock-cells = <0>;
61			clock-frequency = <32768>;
62		};
63
64		hfxo: hfxo {
65			compatible = "nordic,nrf-hfxo";
66			#clock-cells = <0>;
67			clock-frequency = <DT_FREQ_M(32)>;
68		};
69
70		hfpll: hfpll {
71			compatible = "fixed-clock";
72			#clock-cells = <0>;
73			clock-frequency = <DT_FREQ_M(128)>;
74		};
75	};
76
77	soc {
78		#address-cells = <1>;
79		#size-cells = <1>;
80
81#ifdef USE_NON_SECURE_ADDRESS_MAP
82		/* intentionally empty because UICR is hardware fixed to Secure */
83#else
84		uicr: uicr@ffd000 {
85			compatible = "nordic,nrf-uicr";
86			reg = <0xffd000 0x1000>;
87		};
88#endif
89		ficr: ficr@ffc000 {
90			compatible = "nordic,nrf-ficr";
91			reg = <0xffc000 0x1000>;
92			#nordic,ficr-cells = <1>;
93		};
94
95		cpuapp_sram: memory@20000000 {
96			compatible = "mmio-sram";
97			#address-cells = <1>;
98			#size-cells = <1>;
99		};
100
101#ifdef USE_NON_SECURE_ADDRESS_MAP
102		global_peripherals: peripheral@40000000 {
103			#address-cells = <1>;
104			#size-cells = <1>;
105			ranges = <0x0 0x40000000 0x10000000>;
106#else
107		global_peripherals: peripheral@50000000 {
108			#address-cells = <1>;
109			#size-cells = <1>;
110			ranges = <0x0 0x50000000 0x10000000>;
111#endif
112
113			dppic00: dppic@42000 {
114				compatible = "nordic,nrf-dppic";
115				reg = <0x42000 0x808>;
116				status = "disabled";
117			};
118
119			ppib00: ppib@43000 {
120				compatible = "nordic,nrf-ppib";
121				reg = <0x43000 0x1000>;
122				status = "disabled";
123			};
124
125			ppib01: ppib@44000 {
126				compatible = "nordic,nrf-ppib";
127				reg = <0x44000 0x1000>;
128				status = "disabled";
129			};
130
131			spi00: spi@4a000 {
132				/*
133				 * This spi node can be either SPIM or SPIS,
134				 * for the user to pick:
135				 * compatible = "nordic,nrf-spim" or
136				 *              "nordic,nrf-spis".
137				 */
138				compatible = "nordic,nrf-spim";
139				#address-cells = <1>;
140				#size-cells = <0>;
141				reg = <0x4a000 0x1000>;
142				interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>;
143				max-frequency = <DT_FREQ_M(32)>;
144				easydma-maxcnt-bits = <16>;
145				rx-delay-supported;
146				rx-delay = <1>;
147				status = "disabled";
148			};
149
150			uart00: uart@4a000 {
151				compatible = "nordic,nrf-uarte";
152				reg = <0x4a000 0x1000>;
153				interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>;
154				clocks = <&hfpll>;
155				status = "disabled";
156				endtx-stoptx-supported;
157				frame-timeout-supported;
158			};
159
160			cpuflpr_vpr: vpr@4c000 {
161				compatible = "nordic,nrf-vpr-coprocessor";
162				reg = <0x4c000 0x1000>;
163				ranges = <0x0 0x4c000 0x1000>;
164				#address-cells = <1>;
165				#size-cells = <1>;
166				status = "disabled";
167
168				cpuflpr_clic: interrupt-controller@f0000000 {
169					compatible = "nordic,nrf-clic";
170					reg = <0xf0000000 0x1780>;
171					interrupt-controller;
172					#interrupt-cells = <2>;
173					#address-cells = <1>;
174					status = "disabled";
175				};
176			};
177
178			gpio2: gpio@50400 {
179				compatible = "nordic,nrf-gpio";
180				gpio-controller;
181				reg = <0x50400 0x300>;
182				#gpio-cells = <2>;
183				ngpios = <11>;
184				status = "disabled";
185				port = <2>;
186			};
187
188			timer00: timer@55000 {
189				compatible = "nordic,nrf-timer";
190				status = "disabled";
191				reg = <0x55000 0x1000>;
192				cc-num = <6>;
193				max-bit-width = <32>;
194				interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>;
195				clocks = <&hfpll>;
196				prescaler = <0>;
197			};
198
199			dppic10: dppic@82000 {
200				compatible = "nordic,nrf-dppic";
201				reg = <0x82000 0x808>;
202				status = "disabled";
203			};
204
205			ppib10: ppib@83000 {
206				compatible = "nordic,nrf-ppib";
207				reg = <0x83000 0x1000>;
208				status = "disabled";
209			};
210
211			ppib11: ppib@84000 {
212				compatible = "nordic,nrf-ppib";
213				reg = <0x84000 0x1000>;
214				status = "disabled";
215			};
216
217			timer10: timer@85000 {
218				compatible = "nordic,nrf-timer";
219				status = "disabled";
220				reg = <0x85000 0x1000>;
221				cc-num = <8>;
222				max-bit-width = <32>;
223				interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>;
224				clocks = <&hfxo>;
225				prescaler = <0>;
226			};
227
228			egu10: egu@87000 {
229				compatible = "nordic,nrf-egu";
230				reg = <0x87000 0x1000>;
231				interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>;
232				status = "disabled";
233			};
234
235			radio: radio@8a000 {
236				compatible = "nordic,nrf-radio";
237				reg = <0x8a000 0x1000>;
238				interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>;
239				status = "disabled";
240				dfe-supported;
241				ieee802154-supported;
242				ble-2mbps-supported;
243				ble-coded-phy-supported;
244				cs-supported;
245
246				ieee802154: ieee802154 {
247					compatible = "nordic,nrf-ieee802154";
248					status = "disabled";
249				};
250
251				/* Note: In the nRF Connect SDK the SoftDevice Controller
252				 * is added and set as the default Bluetooth Controller.
253				 */
254				bt_hci_controller: bt_hci_controller {
255					compatible = "zephyr,bt-hci-ll-sw-split";
256					status = "disabled";
257				};
258			};
259
260			dppic20: dppic@c2000 {
261				compatible = "nordic,nrf-dppic";
262				reg = <0xc2000 0x808>;
263				status = "disabled";
264			};
265
266			ppib20: ppib@c3000 {
267				compatible = "nordic,nrf-ppib";
268				reg = <0xc3000 0x1000>;
269				status = "disabled";
270			};
271
272			ppib21: ppib@c4000 {
273				compatible = "nordic,nrf-ppib";
274				reg = <0xc4000 0x1000>;
275				status = "disabled";
276			};
277
278			ppib22: ppib@c5000 {
279				compatible = "nordic,nrf-ppib";
280				reg = <0xc5000 0x1000>;
281				status = "disabled";
282			};
283
284			i2c20: i2c@c6000 {
285				compatible = "nordic,nrf-twim";
286				#address-cells = <1>;
287				#size-cells = <0>;
288				reg = <0xc6000 0x1000>;
289				interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
290				easydma-maxcnt-bits = <16>;
291				status = "disabled";
292				zephyr,pm-device-runtime-auto;
293			};
294
295			spi20: spi@c6000 {
296				/*
297				 * This spi node can be either SPIM or SPIS,
298				 * for the user to pick:
299				 * compatible = "nordic,nrf-spim" or
300				 *              "nordic,nrf-spis".
301				 */
302				compatible = "nordic,nrf-spim";
303				#address-cells = <1>;
304				#size-cells = <0>;
305				reg = <0xc6000 0x1000>;
306				interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
307				max-frequency = <DT_FREQ_M(8)>;
308				easydma-maxcnt-bits = <16>;
309				rx-delay-supported;
310				rx-delay = <1>;
311				status = "disabled";
312			};
313
314			uart20: uart@c6000 {
315				compatible = "nordic,nrf-uarte";
316				reg = <0xc6000 0x1000>;
317				interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
318				status = "disabled";
319				endtx-stoptx-supported;
320				frame-timeout-supported;
321			};
322
323			i2c21: i2c@c7000 {
324				compatible = "nordic,nrf-twim";
325				#address-cells = <1>;
326				#size-cells = <0>;
327				reg = <0xc7000 0x1000>;
328				interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
329				easydma-maxcnt-bits = <16>;
330				status = "disabled";
331				zephyr,pm-device-runtime-auto;
332			};
333
334			spi21: spi@c7000 {
335				/*
336				 * This spi node can be either SPIM or SPIS,
337				 * for the user to pick:
338				 * compatible = "nordic,nrf-spim" or
339				 *              "nordic,nrf-spis".
340				 */
341				compatible = "nordic,nrf-spim";
342				#address-cells = <1>;
343				#size-cells = <0>;
344				reg = <0xc7000 0x1000>;
345				interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
346				max-frequency = <DT_FREQ_M(8)>;
347				easydma-maxcnt-bits = <16>;
348				rx-delay-supported;
349				rx-delay = <1>;
350				status = "disabled";
351			};
352
353			uart21: uart@c7000 {
354				compatible = "nordic,nrf-uarte";
355				reg = <0xc7000 0x1000>;
356				interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
357				status = "disabled";
358				endtx-stoptx-supported;
359				frame-timeout-supported;
360			};
361
362			i2c22: i2c@c8000 {
363				compatible = "nordic,nrf-twim";
364				#address-cells = <1>;
365				#size-cells = <0>;
366				reg = <0xc8000 0x1000>;
367				interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
368				easydma-maxcnt-bits = <16>;
369				status = "disabled";
370				zephyr,pm-device-runtime-auto;
371			};
372
373			spi22: spi@c8000 {
374				/*
375				 * This spi node can be either SPIM or SPIS,
376				 * for the user to pick:
377				 * compatible = "nordic,nrf-spim" or
378				 *              "nordic,nrf-spis".
379				 */
380				compatible = "nordic,nrf-spim";
381				#address-cells = <1>;
382				#size-cells = <0>;
383				reg = <0xc8000 0x1000>;
384				interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
385				max-frequency = <DT_FREQ_M(8)>;
386				easydma-maxcnt-bits = <16>;
387				rx-delay-supported;
388				rx-delay = <1>;
389				status = "disabled";
390			};
391
392			uart22: uart@c8000 {
393				compatible = "nordic,nrf-uarte";
394				reg = <0xc8000 0x1000>;
395				interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
396				status = "disabled";
397				endtx-stoptx-supported;
398				frame-timeout-supported;
399			};
400
401			egu20: egu@c9000 {
402				compatible = "nordic,nrf-egu";
403				reg = <0xc9000 0x1000>;
404				interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>;
405				status = "disabled";
406			};
407
408			timer20: timer@ca000 {
409				compatible = "nordic,nrf-timer";
410				status = "disabled";
411				reg = <0xca000 0x1000>;
412				cc-num = <6>;
413				max-bit-width = <32>;
414				interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>;
415				prescaler = <0>;
416			};
417
418			timer21: timer@cb000 {
419				compatible = "nordic,nrf-timer";
420				status = "disabled";
421				reg = <0xcb000 0x1000>;
422				cc-num = <6>;
423				max-bit-width = <32>;
424				interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>;
425				prescaler = <0>;
426			};
427
428			timer22: timer@cc000 {
429				compatible = "nordic,nrf-timer";
430				status = "disabled";
431				reg = <0xcc000 0x1000>;
432				cc-num = <6>;
433				max-bit-width = <32>;
434				interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>;
435				prescaler = <0>;
436			};
437
438			timer23: timer@cd000 {
439				compatible = "nordic,nrf-timer";
440				status = "disabled";
441				reg = <0xcd000 0x1000>;
442				cc-num = <6>;
443				max-bit-width = <32>;
444				interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>;
445				prescaler = <0>;
446			};
447
448			timer24: timer@ce000 {
449				compatible = "nordic,nrf-timer";
450				status = "disabled";
451				reg = <0xce000 0x1000>;
452				cc-num = <6>;
453				max-bit-width = <32>;
454				interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>;
455				prescaler = <0>;
456			};
457
458			pdm20: pdm@d0000 {
459				compatible = "nordic,nrf-pdm";
460				status = "disabled";
461				reg = <0xd0000 0x1000>;
462				interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>;
463			};
464
465			pdm21: pdm@d1000 {
466				compatible = "nordic,nrf-pdm";
467				status = "disabled";
468				reg = <0xd1000 0x1000>;
469				interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>;
470			};
471
472			pwm20: pwm@d2000 {
473				compatible = "nordic,nrf-pwm";
474				status = "disabled";
475				reg = <0xd2000 0x1000>;
476				interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>;
477				#pwm-cells = <3>;
478			};
479
480			pwm21: pwm@d3000 {
481				compatible = "nordic,nrf-pwm";
482				status = "disabled";
483				reg = <0xd3000 0x1000>;
484				interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>;
485				#pwm-cells = <3>;
486			};
487
488			pwm22: pwm@d4000 {
489				compatible = "nordic,nrf-pwm";
490				status = "disabled";
491				reg = <0xd4000 0x1000>;
492				interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>;
493				#pwm-cells = <3>;
494			};
495
496			adc: adc@d5000 {
497				compatible = "nordic,nrf-saadc";
498				reg = <0xd5000 0x1000>;
499				interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>;
500				status = "disabled";
501				#io-channel-cells = <1>;
502				zephyr,pm-device-runtime-auto;
503			};
504
505			nfct: nfct@d6000 {
506				compatible = "nordic,nrf-nfct";
507				reg = <0xd6000 0x1000>;
508				interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>;
509				status = "disabled";
510			};
511
512			temp: temp@d7000 {
513				compatible = "nordic,nrf-temp";
514				reg = <0xd7000 0x1000>;
515				interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>;
516				status = "disabled";
517			};
518
519			gpio1: gpio@d8200 {
520				compatible = "nordic,nrf-gpio";
521				gpio-controller;
522				reg = <0xd8200 0x300>;
523				#gpio-cells = <2>;
524				ngpios = <16>;
525				status = "disabled";
526				port = <1>;
527				gpiote-instance = <&gpiote20>;
528			};
529
530			gpiote20: gpiote@da000 {
531				compatible = "nordic,nrf-gpiote";
532				reg = <0xda000 0x1000>;
533				status = "disabled";
534				instance = <20>;
535			};
536
537			i2s20: i2s@dd000 {
538				compatible = "nordic,nrf-i2s";
539				#address-cells = <1>;
540				#size-cells = <0>;
541				reg = <0xdd000 0x1000>;
542				interrupts = <221 NRF_DEFAULT_IRQ_PRIORITY>;
543				status = "disabled";
544			};
545
546			qdec20: qdec@e0000 {
547				compatible = "nordic,nrf-qdec";
548				reg = <0xe0000 0x1000>;
549				interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>;
550				status = "disabled";
551			};
552
553			qdec21: qdec@e1000 {
554				compatible = "nordic,nrf-qdec";
555				reg = <0xe1000 0x1000>;
556				interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>;
557				status = "disabled";
558			};
559
560			grtc: grtc@e2000 {
561				compatible = "nordic,nrf-grtc";
562				reg = <0xe2000 0x1000>;
563				cc-num = <12>;
564				clocks = <&lfxo>, <&pclk>;
565				clock-names = "lfclock", "hfclock";
566				status = "disabled";
567			};
568
569			dppic30: dppic@102000 {
570				compatible = "nordic,nrf-dppic";
571				reg = <0x102000 0x808>;
572				status = "disabled";
573			};
574
575			ppib30: ppib@103000 {
576				compatible = "nordic,nrf-ppib";
577				reg = <0x103000 0x1000>;
578				status = "disabled";
579			};
580
581			i2c30: i2c@104000 {
582				compatible = "nordic,nrf-twim";
583				#address-cells = <1>;
584				#size-cells = <0>;
585				reg = <0x104000 0x1000>;
586				interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
587				easydma-maxcnt-bits = <16>;
588				status = "disabled";
589				zephyr,pm-device-runtime-auto;
590			};
591
592			spi30: spi@104000 {
593				/*
594				 * This spi node can be either SPIM or SPIS,
595				 * for the user to pick:
596				 * compatible = "nordic,nrf-spim" or
597				 *              "nordic,nrf-spis".
598				 */
599				compatible = "nordic,nrf-spim";
600				#address-cells = <1>;
601				#size-cells = <0>;
602				reg = <0x104000 0x1000>;
603				interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
604				max-frequency = <DT_FREQ_M(8)>;
605				easydma-maxcnt-bits = <16>;
606				rx-delay-supported;
607				rx-delay = <1>;
608				status = "disabled";
609			};
610
611			uart30: uart@104000 {
612				compatible = "nordic,nrf-uarte";
613				reg = <0x104000 0x1000>;
614				interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
615				status = "disabled";
616				endtx-stoptx-supported;
617				frame-timeout-supported;
618			};
619
620			clock: clock@10e000 {
621				compatible = "nordic,nrf-clock";
622				reg = <0x10e000 0x1000>;
623				interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>;
624				status = "disabled";
625			};
626
627			power: power@10e000 {
628				compatible = "nordic,nrf-power";
629				reg = <0x10e000 0x1000>;
630				ranges = <0x0 0x10e000 0x1000>;
631				interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>;
632				status = "disabled";
633				#address-cells = <1>;
634				#size-cells = <1>;
635
636				gpregret1: gpregret1@51c {
637					#address-cells = <1>;
638					#size-cells = <1>;
639					compatible = "nordic,nrf-gpregret";
640					reg = <0x51c 0x1>;
641					status = "disabled";
642				};
643
644				gpregret2: gpregret2@520 {
645					#address-cells = <1>;
646					#size-cells = <1>;
647					compatible = "nordic,nrf-gpregret";
648					reg = <0x520 0x1>;
649					status = "disabled";
650				};
651			};
652
653			comp: comparator@106000 {
654				/*
655				 * Use compatible "nordic,nrf-comp" to configure as COMP
656				 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP
657				 */
658				compatible = "nordic,nrf-comp";
659				reg = <0x106000 0x1000>;
660				status = "disabled";
661				interrupts = <262 NRF_DEFAULT_IRQ_PRIORITY>;
662			};
663
664#ifdef USE_NON_SECURE_ADDRESS_MAP
665			/* intentionally empty because WDT30 is hardware fixed to Secure */
666#else
667			wdt30: watchdog@108000 {
668				compatible = "nordic,nrf-wdt";
669				reg = <0x108000 0x620>;
670				interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>;
671				status = "disabled";
672			};
673#endif
674
675			wdt31: watchdog@109000 {
676				compatible = "nordic,nrf-wdt";
677				reg = <0x109000 0x620>;
678				interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>;
679				status = "disabled";
680			};
681
682			gpio0: gpio@10a000 {
683				compatible = "nordic,nrf-gpio";
684				gpio-controller;
685				reg = <0x10a000 0x300>;
686				#gpio-cells = <2>;
687				ngpios = <5>;
688				status = "disabled";
689				port = <0>;
690				gpiote-instance = <&gpiote30>;
691			};
692
693			gpiote30: gpiote@10c000 {
694				compatible = "nordic,nrf-gpiote";
695				reg = <0x10c000 0x1000>;
696				status = "disabled";
697				instance = <30>;
698			};
699
700			regulators: regulator@120000 {
701				compatible = "nordic,nrf54l-regulators";
702				reg = <0x120000 0x1000>;
703				status = "disabled";
704				#address-cells = <1>;
705				#size-cells = <1>;
706
707				vregmain: regulator@120600 {
708					compatible = "nordic,nrf5x-regulator";
709					reg = <0x120600 0x1>;
710					status = "disabled";
711					regulator-name = "VREGMAIN";
712					regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
713				};
714			};
715		};
716
717		rram_controller: rram-controller@5004b000 {
718			compatible = "nordic,rram-controller";
719			reg = <0x5004b000 0x1000>;
720			#address-cells = <1>;
721			#size-cells = <1>;
722			interrupts = <75 NRF_DEFAULT_IRQ_PRIORITY>;
723
724			cpuapp_rram: rram@0 {
725				compatible = "soc-nv-flash";
726				erase-block-size = <4096>;
727				write-block-size = <16>;
728			};
729		};
730
731		cpuapp_ppb: cpuapp-ppb-bus {
732			#address-cells = <1>;
733			#size-cells = <1>;
734
735			cpuapp_nvic: interrupt-controller@e000e100  {
736				#address-cells = <1>;
737				compatible = "arm,v8m-nvic";
738				reg = <0xe000e100 0xc00>;
739				arm,num-irq-priority-bits = <3>;
740				interrupt-controller;
741				#interrupt-cells = <2>;
742			};
743
744			cpuapp_systick: timer@e000e010 {
745				compatible = "arm,armv8m-systick";
746				reg = <0xe000e010 0x10>;
747				status = "disabled";
748			};
749		};
750	};
751};
752