Searched defs:clk_equ_sysclk (Results 1 – 13 of 13) sorted by relevance
58 …uint32_t clk_equ_sysclk : 1; /*In the master mode 1: spi_clk is eqaul to system… member
90 uint32_t clk_equ_sysclk: 1; /*Set this bit in 1-division mode.*/ member
630 uint32_t clk_equ_sysclk:1; member
109 …uint32_t clk_equ_sysclk : 1; /*1: 1-division mode, the frequency of SPI bus clo… member
61 …uint32_t clk_equ_sysclk : 1; /*In the master mode 1: spi_clk is eqaul to system… member
91 uint32_t clk_equ_sysclk : 1; /*Set this bit in 1-division mode.*/ member
69 …uint32_t clk_equ_sysclk : 1; /*In the master mode 1: spi_clk is eqaul to system… member
103 …uint32_t clk_equ_sysclk : 1; /*When SPI0 accesses flash, set this bit in 1-divi… member
110 …uint32_t clk_equ_sysclk : 1; /*1: 1-division mode, the frequency of SPI bus clo… member
105 …uint32_t clk_equ_sysclk: 1; /*In the master mode 1: spi_clk is eqaul to system… member
92 uint32_t clk_equ_sysclk: 1; /*reserved*/ member
81 …uint32_t clk_equ_sysclk: 1; /*In the master mode 1: spi_clk is eqaul to system 0… member
