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Searched defs:base_address (Results 1 – 11 of 11) sorted by relevance

/Zephyr-latest/drivers/flash/
Dflash_cadence_nand_ll.c16 static inline int32_t cdns_nand_wait_idle(uintptr_t base_address) in cdns_nand_wait_idle()
58 uintptr_t base_address; in cdns_nand_device_info() local
116 static uint32_t cdns_nand_get_thrd_status(uintptr_t base_address, uint8_t thread) in cdns_nand_get_thrd_status()
132 static int cdns_wait_for_thread(uintptr_t base_address, uint8_t thread) in cdns_wait_for_thread()
155 static int cdns_nand_pio_set_features(uintptr_t base_address, uint8_t feat_addr, uint8_t feat_val, in cdns_nand_pio_set_features()
184 static int cdns_pio_transfer_complete(uintptr_t base_address, uint8_t thread) in cdns_pio_transfer_complete()
215 static int cdns_nand_set_opr_mode(uintptr_t base_address, uint8_t opr_mode) in cdns_nand_set_opr_mode()
322 static int cdns_nand_transfer_config(uintptr_t base_address) in cdns_nand_transfer_config()
354 uintptr_t base_address = params->nand_base; in cdns_nand_init() local
530 static int cdns_nand_send(uintptr_t base_address, char *desc_ptr, uint8_t thread) in cdns_nand_send()
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/Zephyr-latest/drivers/reset/
Dreset_rpi_pico.c19 uintptr_t base_address; member
25 uint32_t base_address = config->base_address; in reset_rpi_read_register() local
47 uint32_t base_address = config->base_address; in reset_rpi_write_register() local
Dreset_intel_socfpga.c29 uintptr_t base_address = DEVICE_MMIO_GET(dev); in reset_intel_soc_status() local
44 uintptr_t base_address = DEVICE_MMIO_GET(dev); in reset_intel_soc_update() local
/Zephyr-latest/drivers/syscon/
Dsyscon.c44 uintptr_t base_address; in syscon_generic_read_reg() local
84 uintptr_t base_address; in syscon_generic_write_reg() local
/Zephyr-latest/drivers/interrupt_controller/
Dintc_intel_vtd.c39 uintptr_t base_address = DEVICE_MMIO_GET(dev); in vtd_write_reg32() local
46 uintptr_t base_address = DEVICE_MMIO_GET(dev); in vtd_read_reg32() local
54 uintptr_t base_address = DEVICE_MMIO_GET(dev); in vtd_write_reg64() local
61 uintptr_t base_address = DEVICE_MMIO_GET(dev); in vtd_read_reg64() local
69 uintptr_t base_address = DEVICE_MMIO_GET(dev); in vtd_send_cmd() local
/Zephyr-latest/drivers/clock_control/
Dclock_control_rv32m1_pcc.c18 uint32_t base_address; member
Dclock_control_renesas_cpg_mssr.c19 static void rcar_cpg_reset(uint32_t base_address, uint32_t reg, uint32_t bit) in rcar_cpg_reset()
25 void rcar_cpg_write(uint32_t base_address, uint32_t reg, uint32_t val) in rcar_cpg_write()
33 int rcar_cpg_mstp_clock_endisable(uint32_t base_address, uint32_t module, bool enable) in rcar_cpg_mstp_clock_endisable()
Dclock_control_mcux_pcc.c22 uint32_t base_address; member
/Zephyr-latest/drivers/counter/
Dcounter_mchp_xec.c37 uint32_t base_address; member
/Zephyr-latest/drivers/audio/
Ddmic_mcux.c36 DMIC_Type *base_address; member
/Zephyr-latest/arch/arm/core/mmu/
Darm_mmu_priv.h102 uint32_t base_address : 12; /* [31] */ member