XCHAL_HAVE_CACHEATTR (definition) in projects: hal_xtensa-3.4.0

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Searched defs:XCHAL_HAVE_CACHEATTR (Results 1 – 9 of 9) sorted by relevance

/hal_xtensa-3.4.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
D	core-isa.h	`578 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/intel_icl_adsp/xtensa/config/
D	core-isa.h	`578 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/intel_apl_adsp/xtensa/config/
D	core-isa.h	`578 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/nxp_imx8/xtensa/config/
D	core-isa.h	`616 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/sample_controller/xtensa/config/
D	core-isa.h	`614 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/mimx8ml8/xtensa/config/
D	core-isa.h	`616 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
D	core-isa.h	`601 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
D	core-isa.h	`671 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`
/hal_xtensa-3.4.0/zephyr/soc/intel_s1000/xtensa/config/
D	core-isa.h	`650 #define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
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chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
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hal_infineon-3.7.0
hal_intel-3.5.0
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hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
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hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
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hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
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hal_silabs-3.5.0
hal_silabs-3.6.0
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hal_st-3.7.0
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hal_stm32-3.4.0
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hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
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hal_xtensa-2.7.6
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littlefs-2.7.6
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loramac-node-2.7.6
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loramac-node-3.7.0
lvgl-2.7.6
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lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
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mipi-sys-t-2.7.6
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net-tools-2.7.6
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segger-2.7.6
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tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
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zscilib-3.4.0