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Searched defs:XCHAL_DCACHE_SIZE (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h163 #define XCHAL_DCACHE_SIZE 16384 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h245 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h245 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h245 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h218 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h245 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h238 #define XCHAL_DCACHE_SIZE 0 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h218 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h243 #define XCHAL_DCACHE_SIZE 65536 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h298 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h298 #define XCHAL_DCACHE_SIZE 49152 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h291 #define XCHAL_DCACHE_SIZE 131072 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h286 #define XCHAL_DCACHE_SIZE 0 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h298 #define XCHAL_DCACHE_SIZE 65536 /* D-cache size in bytes or 0 */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h296 #define XCHAL_DCACHE_SIZE 0 /* D-cache size in bytes or 0 */ macro