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Searched defs:TR_IN_SEL0 (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_tcpwm_v2.h59 …__IOM uint32_t TR_IN_SEL0; /*!< 0x00000044 Counter input trigger selection regi… member
Dcyip_tcpwm_v3.h65 …__IOM uint32_t TR_IN_SEL0; /*!< 0x00000044 Counter input trigger selection regi… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_tcpwm_v2.h59 …__IOM uint32_t TR_IN_SEL0; /*!< 0x00000044 Counter input trigger selection regi… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_tcpwm_v2.h59 …__IOM uint32_t TR_IN_SEL0; /*!< 0x00000044 Counter input trigger selection regi… member