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Searched defs:TIMER0_BASE (Results 1 – 25 of 365) sorted by relevance

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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg309f32.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg309f64.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg310f32.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg310f64.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg322f32.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg322f64.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg350f32.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
Defm32hg350f64.h290 #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b100f128gm32.h306 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b100f128im32.h306 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b100f256gm32.h306 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b100f256im32.h306 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f128gm32.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f128im32.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f256gm32.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f256gm48.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f256im32.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f256im48.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defm32pg1b200f128gm48.h308 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p133f256gm48.h322 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defr32fg1p131f256gm32.h322 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defr32fg1p131f256im32.h322 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defr32fg1p132f64gm32.h322 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defr32fg1p133f64gm48.h322 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro
Defr32fg1p131f128gm32.h322 #define TIMER0_BASE (0x40018000UL) /**< TIMER0 base address */ macro

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