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Searched defs:TER (Results 1 – 25 of 41) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_sc300.h747 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm3.h762 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm4.h820 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm7.h1040 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_armv8mml.h1015 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm35p.h1015 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm33.h1015 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_armv81mml.h1096 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm4.h825 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm7.h1049 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
Dcore_cm33.h1023 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h50071 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h50069 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h50069 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h50071 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h50071 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h50069 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
DMIMX8MN6_ca53.h50083 __IO uint32_t TER; /**< TMU Enable Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h11035 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h11005 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h13319 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member
DMCXN546_cm33_core1.h13319 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h13319 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member
DMCXN547_cm33_core1.h13319 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h13365 __IO uint32_t TER; /**< Tamper Enable, offset: 0x24 */ member

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