/hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/ |
D | S32K142_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K146_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K144_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K116_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K144W_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K148_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K142W_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K118_RTC.h | 76 …__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC … member
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D | S32K146_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K118_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K142W_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K144_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K144W_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K142_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K148_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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D | S32K116_LPSPI.h | 90 __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD5/drivers/upower/ |
D | upmu.h | 324 MU_TCR_tag TCR; // TCR Register member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD3/drivers/upower/ |
D | upmu.h | 324 MU_TCR_tag TCR; // TCR Register member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD7/drivers/upower/ |
D | upmu.h | 324 MU_TCR_tag TCR; // TCR Register member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US3/drivers/upower/ |
D | upmu.h | 324 MU_TCR_tag TCR; // TCR Register member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US5/drivers/upower/ |
D | upmu.h | 324 MU_TCR_tag TCR; // TCR Register member
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/hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_LPSPI.h | 95 __IO uint32_t TCR; /**< Transmit Command, offset: 0x60 */ member
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/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_SPI.h | 82 __IO uint32_t TCR; /**< Transfer Count Register, offset: 0x8 */ member
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D | S32Z2_DSPI.h | 81 __IO uint32_t TCR; /**< Transfer Count Register, offset: 0x8 */ member
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D | S32Z2_CTU.h | 81 …__IO uint16_t TCR[CTU_TCR_COUNT]; /**< Trigger Compare Register, array offset: 0x6,… member
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