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Searched defs:STATUS (Results 1 – 25 of 39) sorted by relevance

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/hal_microchip-latest/mec5/devices/common/
Dmec5_bcl_v1.h18 …__IOM uint32_t STATUS; /*!< (@ 0x00000000) BC-Link status … member
Dmec5_wdt_v2.h22 …__IOM uint32_t STATUS; /*!< (@ 0x00000010) WDT Status … member
Dmec5_eeprom_ctrl_v1.h20 …__IOM uint32_t STATUS; /*!< (@ 0x00000008) Controller status register … member
Dmec5_btmr_v1.h20 …__IOM uint32_t STATUS; /*!< (@ 0x00000008) Basic timer status … member
Dmec5_tach_v1.h19 …__IOM uint32_t STATUS; /*!< (@ 0x00000004) Tachometer status … member
Dmec5_ps2_v1.h22 …__IOM uint8_t STATUS; /*!< (@ 0x00000008) PS2 status … member
Dmec5_gspi_v1.h20 …__IM uint32_t STATUS; /*!< (@ 0x00000008) GSPI status … member
Dmec5_bdp_v1.h22 …__IM uint8_t STATUS; /*!< (@ 0x00000108) BDP EC-only: status(RO) … member
/hal_microchip-latest/pic32c/pic32cxsg/include/fixups/component/
Dtc_component_fixup_pic32cxsg.h223 uint32_t STATUS:1; /*!< bit: 3 STATUS */ member
359 __IO TC_STATUS_Type STATUS; /**< \brief Offset: 0x0B (R/W 8) Status */ member
385 __IO TC_STATUS_Type STATUS; /**< \brief Offset: 0x0B (R/W 8) Status */ member
409 __IO TC_STATUS_Type STATUS; /**< \brief Offset: 0x0B (R/W 8) Status */ member
Dramecc_component_fixup_pic32cxsg.h86 __I RAMECC_STATUS_Type STATUS; /**< \brief Offset: 0x3 (R/ 8) Status */ member
Dfreqm_component_fixup_pic32cxsg.h122 __IO FREQM_STATUS_Type STATUS; /**< \brief Offset: 0x0B (R/W 8) Status Register */ member
Dpdec_component_fixup_pic32cxsg.h207 uint32_t STATUS:1; /*!< bit: 3 Status Synchronization Busy */ member
309 __IO PDEC_STATUS_Type STATUS; /**< \brief Offset: 0x0C (R/W 16) Status */ member
Dosc32kctrl_component_fixup_pic32cxsg.h142 …__I OSC32KCTRL_STATUS_Type STATUS; /**< \brief Offset: 0x0C (R/ 32) Power and Clocks Sta… member
Dsupc_component_fixup_pic32cxsg.h184 …__I SUPC_STATUS_Type STATUS; /**< \brief Offset: 0x0C (R/ 32) Power and Clocks Sta… member
Ddac_component_fixup_pic32cxsg.h227 __I DAC_STATUS_Type STATUS; /**< \brief Offset: 0x07 (R/ 8) Status */ member
Dqspi_component_fixup_pic32cxsg.h225 __I QSPI_STATUS_Type STATUS; /**< \brief Offset: 0x20 (R/ 32) Status Register */ member
/hal_microchip-latest/mec/mec1501/component/
Dport80cap.h143 __IOM uint32_t STATUS; /*!< (@ 0x0108) Status. Read-only */ member
Dps2_ctrl.h162 __IOM uint32_t STATUS; /*!< (@ 0x0008) PS/2 Status */ member
Dtach.h163 __IOM uint32_t STATUS; /*!< (@ 0x0004) TACH Status b[7:0] */ member
Dadc.h190 __IOM uint32_t STATUS; /*!< (@ 0x0008) ADC Status */ member
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_mpu.h114 __IO MPU_FailStatus_TypeDef STATUS; member
/hal_microchip-latest/mpfs/drivers/mss/mss_watchdog/
Dmss_watchdog.h282 volatile uint32_t STATUS; member
/hal_microchip-latest/mpfs/drivers/mss/mss_qspi/
Dmss_qspi.h372 volatile uint32_t STATUS; member
/hal_microchip-latest/mpfs/drivers/mss/mss_spi/
Dmss_spi.h235 volatile uint32_t STATUS; member
/hal_microchip-latest/mpfs/drivers/mss/mss_i2c/
Dmss_i2c.h527 uint8_t STATUS; member

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