Home
last modified time | relevance | path

Searched defs:SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_srss.h365 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk 0xFUL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_srss_v3_2.h556 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk 0xFUL macro
Dcyip_srss_v3_3.h614 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk 0xFUL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_srss.h682 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk 0xFUL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe_remaps.h267 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk SRSS_V2_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk macro
808 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk SRSS_V3_CLK_OUTPUT_SLOW_SLOW_SEL0_Msk macro