| /hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_SIRC.h | 74 __I uint32_t SR; /**< Status Register, offset: 0x4 */ member
|
| D | S32K344_CMU_FM.h | 75 __IO uint32_t SR; /**< Status Register, offset: 0x8 */ member
|
| D | S32K344_CMU_FC.h | 77 __IO uint32_t SR; /**< Status Register, offset: 0x10 */ member
|
| D | S32K344_SWT.h | 77 __O uint32_t SR; /**< Service, offset: 0x10 */ member
|
| D | S32K344_LPSPI.h | 81 __IO uint32_t SR; /**< Status, offset: 0x14 */ member
|
| D | S32K344_QUADSPI.h | 107 __I uint32_t SR; /**< Status Register, offset: 0x15C */ member
|
| D | S32K344_MU.h | 80 __IO uint32_t SR; /**< Status Register, offset: 0xC */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/mcuxpresso/ |
| D | boot_multicore_slave.c | 40 __IO uint32_t SR; /**< Status Register, offset: 0x60 */ member
|
| /hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/ |
| D | Clock_Ip_Specific.h | 409 volatile uint32 SR; /**< Status Register, offset: 0x10 */ member
|
| /hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_SWT.h | 77 __O uint32_t SR; /**< Service, offset: 0x10 */ member
|
| D | S32Z2_CMU_FC.h | 77 __IO uint32_t SR; /**< Status Register, offset: 0x10 */ member
|
| D | S32Z2_SPI.h | 88 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
| D | S32Z2_DSPI.h | 86 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
| D | S32Z2_SIPI.h | 109 __IO uint32_t SR; /**< SIPI Status Register, offset: 0xA0 */ member
|
| D | S32Z2_SINC.h | 85 __I uint32_t SR; /**< Status, offset: 0x24 */ member
|
| D | S32Z2_MU.h | 80 __IO uint32_t SR; /**< Status Register, offset: 0xC */ member
|
| D | S32Z2_QUADSPI.h | 117 __I uint32_t SR; /**< Status Register, offset: 0x15C */ member
|
| /hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/ |
| D | Clock_Ip_Specific.h | 252 volatile uint32 SR; /**< Status Register, offset: 0x10 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/nand/semc/ |
| D | fsl_semc_nand_flash.c | 790 uint8_t SR = 0; in semc_nand_is_device_ecc_check_passed() local
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F25612/ |
| D | MK22F25612.h | 1372 __IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */ member
10592 __I uint32_t SR; /**< RNGA Status Register, offset: 0x4 */ member
10753 __IO uint32_t SR; /**< RTC Status Register, offset: 0x14 */ member
12279 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F51212/ |
| D | MK22F51212.h | 1382 __IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */ member
10848 __I uint32_t SR; /**< RNGA Status Register, offset: 0x4 */ member
11009 __IO uint32_t SR; /**< RTC Status Register, offset: 0x14 */ member
12677 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F25612/ |
| D | MKV31F25612.h | 1366 __IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */ member
9786 __I uint32_t SR; /**< RNGA Status Register, offset: 0x4 */ member
10964 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F51212/ |
| D | MKV31F51212.h | 1366 __IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */ member
10032 __I uint32_t SR; /**< RNGA Status Register, offset: 0x4 */ member
11352 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKL25Z4/ |
| D | MKL25Z4.h | 740 __IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */ member
3463 __IO uint32_t SR; /**< RTC Status Register, offset: 0x14 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12810/ |
| D | MK22F12810.h | 1366 __IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */ member
9681 __IO uint32_t SR; /**< RTC Status Register, offset: 0x14 */ member
11159 __IO uint32_t SR; /**< Status Register, offset: 0x2C */ member
|
