/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/ |
D | MKE14Z4.h | 9626 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/ |
D | MKE15Z4.h | 9628 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/ |
D | MKE12Z7.h | 12143 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/ |
D | MKE16Z4.h | 10465 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/ |
D | MKE13Z7.h | 12146 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/ |
D | MKE17Z7.h | 12149 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/ |
D | MKE14Z7.h | 12406 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/ |
D | MKE15Z7.h | 12409 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/ |
D | MKE16F16.h | 16325 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/ |
D | MKE14F16.h | 15325 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/ |
D | MKE18F16.h | 16331 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/ |
D | K32L2A31A.h | 13922 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/ |
D | K32L2A41A.h | 13922 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/ |
D | K32L3A60_cm0plus.h | 15137 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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D | K32L3A60_cm4.h | 15087 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 26014 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 26013 __IO uint32_t SIRCDIV; /**< Slow IRC Divide Register, offset: 0x204 */ member
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