/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC802/ |
D | LPC802.h | 1175 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC804/ |
D | LPC804.h | 1557 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKL17Z644/ |
D | MKL17Z644.h | 5990 __IO uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKL27Z644/ |
D | MKL27Z644.h | 5999 __IO uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC844/ |
D | LPC844.h | 1255 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC845/ |
D | LPC845.h | 1661 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/ |
D | MKE14Z4.h | 8671 __IO uint32_t MR; /**< Mode Register, offset: 0x10 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC51U68/ |
D | LPC51U68.h | 1288 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/ |
D | MKE15Z4.h | 8673 __IO uint32_t MR; /**< Mode Register, offset: 0x10 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F12810/ |
D | MKV31F12810.h | 8509 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54114/ |
D | LPC54114_cm0plus.h | 1244 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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D | LPC54114_cm4.h | 1255 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/ |
D | MKE16Z4.h | 9510 __IO uint32_t MR; /**< Mode Register, offset: 0x10 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54113/ |
D | LPC54113.h | 1256 …__IO uint32_t MR[4]; /**< Match Register . MR can be enabled through t… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F25612/ |
D | MKV31F25612.h | 9406 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F51212/ |
D | MKV31F51212.h | 9652 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2B11A/ |
D | K32L2B11A.h | 10507 __IO uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2B31A/ |
D | K32L2B31A.h | 10507 __IO uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2B21A/ |
D | K32L2B21A.h | 10507 __IO uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/ |
D | MKE14Z7.h | 11370 __IO uint32_t MR; /**< Mode Register, offset: 0x10 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/ |
D | MKE15Z7.h | 11373 __IO uint32_t MR; /**< Mode Register, offset: 0x10 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12810/ |
D | MK22F12810.h | 9248 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW22D5/ |
D | MKW22D5.h | 5790 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW24D5/ |
D | MKW24D5.h | 5790 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F25612/ |
D | MK22F25612.h | 10149 __I uint8_t MR; /**< Mode Register, offset: 0x7 */ member
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