/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX3/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/drivers/ |
D | fsl_soc_mipi_dsi.h | 35 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 39 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/mipi_dsi_split/ |
D | fsl_mipi_dsi.c | 78 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_LVDS_COMBO_CSR_ULPS_CTRL_TX_ULPS_MASK macro 82 #define MIPI_DSI_CSR_ULPS_CTRL_ULPS_MASK MIPI_DSI_TX_ULPS_ENABLE_TX_ULPS_ENABLE_MASK macro
|