/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_LPI2C.h | 81 __IO uint32_t MCFGR1; /**< Master Configuration 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/ |
D | MKE14Z4.h | 3520 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/ |
D | MKE15Z4.h | 3521 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/ |
D | MKE12Z7.h | 6348 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/ |
D | MKE16Z4.h | 3519 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/ |
D | MKE13Z7.h | 6350 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/ |
D | MKE17Z7.h | 6352 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/ |
D | MKE14Z7.h | 6080 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/ |
D | MKE15Z7.h | 6082 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/ |
D | MKE16F16.h | 9527 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/ |
D | MKE14F16.h | 8528 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/ |
D | MKE18F16.h | 9532 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/ |
D | K32L2A31A.h | 7396 __IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/ |
D | K32L2A41A.h | 7396 __IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/ |
D | K32L3A60_cm0plus.h | 9169 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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D | K32L3A60_cm4.h | 9804 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
D | MIMXRT1011.h | 18352 __IO uint32_t MCFGR1; /**< Master Configuration 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 11995 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 11994 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
D | MIMXRT1015.h | 21390 __IO uint32_t MCFGR1; /**< Master Configuration 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 25545 __IO uint32_t MCFGR1; /**< Master Configuration 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 25528 __IO uint32_t MCFGR1; /**< Master Configuration 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
D | MIMXRT1041.h | 28078 __IO uint32_t MCFGR1; /**< Master Configuration 1, offset: 0x24 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 26584 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 29291 …__IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x2… member
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