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Searched defs:LPSPI_CFGR1_PINCFG_MASK (Results 1 – 25 of 60) sorted by relevance

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/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPSPI.h395 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h5241 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h5242 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h8271 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h5240 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h8273 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h8275 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h7805 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h7807 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h11454 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h10455 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h11459 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h9167 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h9167 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h10825 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
DK32L3A60_cm4.h11460 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h19904 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h13758 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h13757 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h22942 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h27105 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h27088 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h29639 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h28140 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h30847 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro

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