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Searched defs:LPCMP_CCR1_EVT_SEL_MASK (Results 1 – 25 of 25) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPCMP.h218 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h16830 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h16830 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h16830 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h16830 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h23046 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h23046 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h23046 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h23050 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h23050 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h23050 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h18550 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h20719 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h36285 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h36255 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h21556 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
DMCXW727C_cm33_core1.h29866 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h46476 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
DMCXN546_cm33_core1.h46476 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h46476 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
DMCXN547_cm33_core1.h46476 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h46911 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
DMCXN947_cm33_core0.h46911 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h46911 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro
DMCXN946_cm33_core1.h46911 #define LPCMP_CCR1_EVT_SEL_MASK (0xC00U) macro