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Searched defs:Instance (Results 1 – 25 of 25) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Pwm/src/
DEmios_Pwm_Ip.c235 static inline boolean Emios_Pwm_Ip_ValidateMode(uint8 Instance, in Emios_Pwm_Ip_ValidateMode()
263 static inline Emios_Pwm_Ip_PeriodType Emios_Pwm_Ip_GetCounterBusPeriod(uint8 Instance, in Emios_Pwm_Ip_GetCounterBusPeriod()
292 static inline Emios_Pwm_Ip_MasterBusModeType Emios_Pwm_Ip_GetCounterBusMode(uint8 Instance, in Emios_Pwm_Ip_GetCounterBusMode()
326 static void Emios_Pwm_Ip_InitPeriodDutyCycleOpwfmbMode(uint8 Instance, in Emios_Pwm_Ip_InitPeriodDutyCycleOpwfmbMode()
391 static void Emios_Pwm_Ip_InitPeriodDutyCycleOpwfmMode(uint8 Instance, in Emios_Pwm_Ip_InitPeriodDutyCycleOpwfmMode()
468 static inline Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_SetDutyCycleOpwfmb(uint8 Instance, in Emios_Pwm_Ip_SetDutyCycleOpwfmb()
534 static inline Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_SetDutyCycleOpwfm(uint8 Instance, in Emios_Pwm_Ip_SetDutyCycleOpwfm()
631 static void Emios_Pwm_Ip_InitDeadTimeMode(uint8 Instance, in Emios_Pwm_Ip_InitDeadTimeMode()
720 static inline Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_SetDutyCycleOpwmcb(uint8 Instance, in Emios_Pwm_Ip_SetDutyCycleOpwmcb()
791 static inline Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_SetDutyCycleOpwmc(uint8 Instance, in Emios_Pwm_Ip_SetDutyCycleOpwmc()
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DEmios_Pwm_Ip_Irq.c207 static void Emios_Pwm_Ip_IrqDaocHandler(uint8 Instance, uint8 Channel) in Emios_Pwm_Ip_IrqDaocHandler()
261 void Emios_Pwm_Ip_IrqHandler(uint8 Instance, uint8 Channel) in Emios_Pwm_Ip_IrqHandler()
/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip.c363 static void Gmac_Ip_ReadTimeStampInfo(uint8 Instance, in Gmac_Ip_ReadTimeStampInfo()
416 static Gmac_Ip_StatusType Gmac_Ip_InitDMA(uint8 Instance, in Gmac_Ip_InitDMA()
547 uint8 Instance, in Gmac_Ip_WriteGateControlList()
605 static void Gmac_Ip_InitMTL(uint8 Instance, in Gmac_Ip_InitMTL()
696 static void Gmac_Ip_InitStateStructure(uint8 Instance, in Gmac_Ip_InitStateStructure()
729 static void Gmac_Ip_InitTxBD(uint8 Instance, in Gmac_Ip_InitTxBD()
789 static void Gmac_Ip_InitRxBD(uint8 Instance, in Gmac_Ip_InitRxBD()
926 static void Gmac_Ip_RestoreTxDescr(uint8 Instance) in Gmac_Ip_RestoreTxDescr()
955 static void Gmac_Ip_RestoreRxDescr(uint8 Instance) in Gmac_Ip_RestoreRxDescr()
982 uint8 Instance, in Gmac_Ip_CheckMTLEmpty()
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DGmac_Ip_Hw_Access.c178 const uint8 Instance, \ in GMAC_IrqFSMHandler()
206 const uint8 Instance, \ in GMAC_IrqFSMDPPHandler()
232 const uint8 Instance, \ in GMAC_IrqECCHandler()
253 static void GMAC_MACIRQHandler(uint8 Instance) in GMAC_MACIRQHandler()
383 void GMAC_CommonIRQHandler(uint8 Instance) in GMAC_CommonIRQHandler()
430 void GMAC_SafetyIRQHandler(uint8 Instance) in GMAC_SafetyIRQHandler()
471 void GMAC_RxIRQHandler(uint8 Instance, in GMAC_RxIRQHandler()
511 void GMAC_TxIRQHandler(uint8 Instance, in GMAC_TxIRQHandler()
/hal_nxp-3.5.0/s32/drivers/s32ze/Uart/src/
DLinflexd_Uart_Ip.c247 Linflexd_Uart_Ip_StatusType Linflexd_Uart_Ip_SetBaudrate(const uint8 Instance, in Linflexd_Uart_Ip_SetBaudrate()
341 void Linflexd_Uart_Ip_GetBaudrate(const uint8 Instance, uint32 * ConfiguredBaudRate) in Linflexd_Uart_Ip_GetBaudrate()
366 void Linflexd_Uart_Ip_Init(const uint8 Instance, const Linflexd_Uart_Ip_UserConfigType * UserConfig) in Linflexd_Uart_Ip_Init()
433 Linflexd_Uart_Ip_StatusType Linflexd_Uart_Ip_Deinit(const uint8 Instance) in Linflexd_Uart_Ip_Deinit()
494 void Linflexd_Uart_Ip_SetTxBuffer(const uint8 Instance, in Linflexd_Uart_Ip_SetTxBuffer()
522 void Linflexd_Uart_Ip_SetRxBuffer(const uint8 Instance, in Linflexd_Uart_Ip_SetRxBuffer()
549 static void Linflexd_Uart_Ip_PutData(const uint8 Instance) in Linflexd_Uart_Ip_PutData()
598 static void Linflexd_Uart_Ip_CompleteSendUsingInterrupts(const uint8 Instance) in Linflexd_Uart_Ip_CompleteSendUsingInterrupts()
651 static void Linflexd_Uart_Ip_CompleteReceiveUsingInterrupts(const uint8 Instance) in Linflexd_Uart_Ip_CompleteReceiveUsingInterrupts()
722 Linflexd_Uart_Ip_StatusType Linflexd_Uart_Ip_SyncSend(const uint8 Instance, in Linflexd_Uart_Ip_SyncSend()
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/hal_nxp-3.5.0/s32/drivers/s32ze/Spi/src/
DSpi_Ip.c281 static void Spi_Ip_TransferProcess(uint8 Instance) in Spi_Ip_TransferProcess()
369 static void Spi_Ip_CmdDmaTcdSGInit(uint8 Instance) in Spi_Ip_CmdDmaTcdSGInit()
408 static void Spi_Ip_TxDmaTcdSGInit(uint8 Instance) in Spi_Ip_TxDmaTcdSGInit()
445 static void Spi_Ip_TxDmaTcdSGConfig(uint8 Instance, uint8 TCDSGIndex, uint8 DisHwReq) in Spi_Ip_TxDmaTcdSGConfig()
502 static void Spi_Ip_RxDmaTcdSGInit(uint8 Instance) in Spi_Ip_RxDmaTcdSGInit()
537 static void Spi_Ip_RxDmaTcdSGConfig(uint8 Instance, uint8 TCDSGIndex, uint8 DisHwReq) in Spi_Ip_RxDmaTcdSGConfig()
600 static void Spi_Ip_CmdDmaTcdSGConfig( uint8 Instance, in Spi_Ip_CmdDmaTcdSGConfig()
629 static void Spi_Ip_DmaConfig(uint8 Instance) in Spi_Ip_DmaConfig()
848 static void Spi_Ip_DmaContinueTransfer(uint8 Instance) in Spi_Ip_DmaContinueTransfer()
976 uint8 Instance in Spi_Ip_ReadRxFifo()
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/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Pll.c170 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize() local
184 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize() local
233 uint32 Instance = Clock_Ip_au8ClockFeatures[PllName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_CompletePlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize() local
259 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_EnablePlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize() local
280 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetPlldigRdivMfiMfnSdmen() local
294 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetPlldigRdivMfiMfnSdmen() local
335 uint32 Instance = Clock_Ip_au8ClockFeatures[PllName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_CompletePlldigRdivMfiMfnSdmen() local
361 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_EnablePlldigRdivMfiMfnSdmen() local
383 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetLfastPLL() local
398 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetLfastPLL() local
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DClock_Ip_ExtOsc.c150 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetFxoscOsconBypEocvGmSel() local
159 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetFxoscOsconBypEocvGmSel() local
185 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_CompleteFxoscOsconBypEocvGmSel() local
223 uint32 Instance = Clock_Ip_au8ClockFeatures[XoscName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_DisableFxoscOsconBypEocvGmSel() local
230 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_EnableFxoscOsconBypEocvGmSel() local
DClock_Ip_Selector.c152 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetCgmXCscCssClkswSwip() local
165 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetCgmXCscCssClkswSwip() local
246 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetCgmXCscCssCsGrip() local
283 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetCgmXCscCssCsGrip() local
350 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetGprXClkoutSelMuxsel() local
DClock_Ip_FracDiv.c138 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetDfsMfiMfn() local
147 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetDfsMfiMfn() local
177 uint32 Instance = Clock_Ip_au8ClockFeatures[DfsName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_CompleteDfsMfiMfn() local
DClock_Ip_Divider.c136 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase() local
207 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetCgmXDeDivStatWithoutPhaseWithTrigger() local
268 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetPlldigPll0divDeDivOutput() local
DClock_Ip_DividerTrigger.c127 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat() local
143 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat() local
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_ExtOsc.c157 uint32 Instance; in Clock_Ip_ResetFxoscOsconBypEocvGmSel() local
175 uint32 Instance; in Clock_Ip_SetFxoscOsconBypEocvGmSel() local
219 uint32 Instance; in Clock_Ip_CompleteFxoscOsconBypEocvGmSel() local
271 uint32 Instance = Clock_Ip_au8ClockFeatures[XoscName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_DisableFxoscOsconBypEocvGmSel() local
278 uint32 Instance; in Clock_Ip_EnableFxoscOsconBypEocvGmSel() local
300 uint32 Instance; in Clock_Ip_ResetSxoscOsconEocv() local
318 uint32 Instance; in Clock_Ip_SetSxoscOsconEocv() local
349 uint32 Instance; in Clock_Ip_CompleteSxoscOsconEocv() local
DClock_Ip_Pll.c163 uint32 Instance; in Clock_Ip_ResetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize() local
186 uint32 Instance; in Clock_Ip_SetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize() local
239 uint32 Instance = Clock_Ip_au8ClockFeatures[PllName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_CompletePllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize() local
268 uint32 Instance; in Clock_Ip_EnablePllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize() local
300 uint32 Instance; in Clock_Ip_ResetPllRdivMfiMfnOdiv2Sdmen() local
325 uint32 Instance; in Clock_Ip_SetPllRdivMfiMfnOdiv2Sdmen() local
359 uint32 Instance = Clock_Ip_au8ClockFeatures[PllName][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_CompletePllRdivMfiMfnOdiv2Sdmen() local
387 uint32 Instance; in Clock_Ip_EnablePllRdivMfiMfnOdiv2Sdmen() local
DClock_Ip_Selector.c150 uint32 Instance; in Clock_Ip_ResetCgmXCscCssClkswSwip() local
175 uint32 Instance; in Clock_Ip_SetCgmXCscCssClkswSwip() local
281 uint32 Instance; in Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip() local
307 uint32 Instance; in Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip() local
414 uint32 Instance; in Clock_Ip_ResetCgmXCscCssCsGrip() local
479 uint32 Instance; in Clock_Ip_SetCgmXCscCssCsGrip() local
DClock_Ip_Divider.c138 uint32 Instance; in Clock_Ip_SetCgmXDeDivStatWithoutPhase() local
232 uint32 Instance; in Clock_Ip_SetPllPll0divDeDivOutput() local
265 uint32 Instance; in Clock_Ip_SetPllPlldvOdiv2Output() local
DClock_Ip_DividerTrigger.c127 uint32 Instance; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat() local
155 uint32 Instance; in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat() local
/hal_nxp-3.5.0/s32/drivers/s32ze/Swt/src/
DSwt_Ip.c427 Swt_Ip_StatusType Swt_Ip_Init(const uint32 Instance, in Swt_Ip_Init()
485 Swt_Ip_StatusType Swt_Ip_Deinit(const uint32 Instance) in Swt_Ip_Deinit()
532 void Swt_Ip_Service(const uint32 Instance) in Swt_Ip_Service()
589 Swt_Ip_StatusType Swt_Ip_Config(const uint32 Instance, in Swt_Ip_Config()
638 Swt_Ip_StatusType Swt_Ip_SetTimeout(const uint32 Instance, in Swt_Ip_SetTimeout()
694 Swt_Ip_StatusType Swt_Ip_StartTimer(const uint32 Instance) in Swt_Ip_StartTimer()
726 Swt_Ip_StatusType Swt_Ip_StopTimer(const uint32 Instance) in Swt_Ip_StopTimer()
764 Swt_Ip_StatusType Swt_Ip_ClearResetRequest(const uint32 Instance) in Swt_Ip_ClearResetRequest()
814 void Swt_Ip_IrqHandler(uint32 Instance) in Swt_Ip_IrqHandler()
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcl/src/
DEmios_Mcl_Ip.c161 Emios_Ip_CommonStatusType Emios_Mcl_Ip_Init(uint8 Instance, const Emios_Mcl_Ip_ConfigType* const Co… in Emios_Mcl_Ip_Init()
263 void Emios_Mcl_Ip_EnableChannel(uint8 Instance, uint8 HwChannel) in Emios_Mcl_Ip_EnableChannel()
275 void Emios_Mcl_Ip_DisableChannel(uint8 Instance, uint8 HwChannel) in Emios_Mcl_Ip_DisableChannel()
287 void Emios_Mcl_Ip_ComparatorTransferEnable(uint8 Instance, uint32 ChannelMask) in Emios_Mcl_Ip_ComparatorTransferEnable()
300 void Emios_Mcl_Ip_ComparatorTransferDisable(uint8 Instance, uint32 ChannelMask) in Emios_Mcl_Ip_ComparatorTransferDisable()
313 Emios_Ip_CommonStatusType Emios_Mcl_Ip_Deinit(uint8 Instance) in Emios_Mcl_Ip_Deinit()
437 uint32 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel) in Emios_Mcl_Ip_GetCounterBusPeriod()
472 void Emios_Mcl_Ip_ConfigureGlobalTimebase(uint8 Instance, uint8 Value) in Emios_Mcl_Ip_ConfigureGlobalTimebase()
/hal_nxp-3.5.0/s32/drivers/s32k3/Adc/src/
DAdc_Sar_Ip.c390 static inline uint8 Adc_Sar_GetResolution(const uint32 Instance) in Adc_Sar_GetResolution()
412 static inline void Adc_Sar_ConfigSelftestThreshold(const uint32 Instance, in Adc_Sar_ConfigSelftestThreshold()
522 static inline void Adc_Sar_EnableSelftestThreshold(const uint32 Instance) in Adc_Sar_EnableSelftestThreshold()
616 static inline void Adc_Sar_DisableSelftestThreshold(const uint32 Instance) in Adc_Sar_DisableSelftestThreshold()
708 static inline uint16 Adc_Sar_GetMaskedResult(const uint32 Instance, in Adc_Sar_GetMaskedResult()
758 static inline uint32 Adc_Sar_GetMsrFlags(const uint32 Instance) in Adc_Sar_GetMsrFlags()
807 static inline uint32 Adc_Sar_GetIsrFlags(const uint32 Instance) in Adc_Sar_GetIsrFlags()
885 static inline uint32 Adc_Sar_CollectMcrMasks(const uint32 Instance, in Adc_Sar_CollectMcrMasks()
1002 static inline void Adc_Sar_ConfigChannels(const uint32 Instance, in Adc_Sar_ConfigChannels()
1101 static inline Adc_Sar_Ip_StatusType Adc_Sar_CheckSelfTestProgress(const uint32 Instance) in Adc_Sar_CheckSelfTestProgress()
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/hal_nxp-3.5.0/s32/drivers/s32k3/Adc/include/
DAdc_Sar_Ip_HwAccess.h116 static inline void Adc_Sar_Powerup(const uint32 Instance) in Adc_Sar_Powerup()
143 static inline void Adc_Sar_Powerdown(const uint32 Instance) in Adc_Sar_Powerdown()
187 static inline void Adc_Sar_WriteThresholds(const uint32 Instance, in Adc_Sar_WriteThresholds()
363 static inline volatile uint32 * Adc_Sar_GetChannelWatchdogAddress(const uint32 Instance, in Adc_Sar_GetChannelWatchdogAddress()
485 static inline void Adc_Sar_WriteChannelMapping(const uint32 Instance, in Adc_Sar_WriteChannelMapping()
516 static inline void Adc_Sar_ResetWdogCWSELR(const uint32 Instance, const uint8 RegisterNumber) in Adc_Sar_ResetWdogCWSELR()
/hal_nxp-3.5.0/s32/drivers/s32ze/Can_CANEXCEL/src/
DCanEXCEL_Ip_HwAccess.c448 void CanXL_ConfigInterrupts(uint8 Instance) in CanXL_ConfigInterrupts()
454 void CanXL_EnableInterrupts(CANXL_SIC_Type * base, uint8 Instance) in CanXL_EnableInterrupts()
464 void CanXL_DisableInterrupts(CANXL_SIC_Type * base, uint8 Instance) in CanXL_DisableInterrupts()
480 void CanXL_ResetImaskBuff(CANXL_GRP_CONTROL_Type * base,uint8 Instance) in CanXL_ResetImaskBuff()
/hal_nxp-3.5.0/s32/drivers/s32ze/Spi/include/
DSpi_Ip_Types.h145 uint8 Instance; /**< Instance of the hardware unit. */ member
193 uint8 Instance; /**< Instance of the hardware unit. */ member
/hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/
DQspi_Ip_Controller.h103 #define Qspi_Ip_WriteLuts(Instance, StartLutRegister, Data, Size) \ argument
/hal_nxp-3.5.0/s32/drivers/s32k3/Fls/src/
DQspi_Ip_Controller.c1218 void Qspi_Ip_WriteLuts_Privileged(uint32 Instance, in Qspi_Ip_WriteLuts_Privileged()