/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW31Z4/ |
D | MKW31Z4.h | 561 __IO uint32_t IRQ_CTRL; /**< IRQ CONTROL, offset: 0x0 */ member 2601 __IO uint32_t IRQ_CTRL; /**< IRQ CONTROL, offset: 0x0 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW41Z4/ |
D | MKW41Z4.h | 561 __IO uint32_t IRQ_CTRL; /**< IRQ CONTROL, offset: 0x0 */ member 2601 __IO uint32_t IRQ_CTRL; /**< IRQ CONTROL, offset: 0x0 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW21Z4/ |
D | MKW21Z4.h | 560 __IO uint32_t IRQ_CTRL; /**< IRQ CONTROL, offset: 0x0 */ member 2530 __IO uint32_t IRQ_CTRL; /**< IRQ CONTROL, offset: 0x0 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 3680 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 3678 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 3680 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
D | MIMX8MN6_ca53.h | 3707 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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D | MIMX8MN6_cm7.h | 3678 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
D | MIMX8MN5_cm7.h | 3680 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/ |
D | MIMX8MN4_cm7.h | 3678 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/ |
D | MIMX8ML8_ca53.h | 3904 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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D | MIMX8ML8_dsp.h | 3860 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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D | MIMX8ML8_cm7.h | 3877 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/ |
D | MIMX8ML6_cm7.h | 3877 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/ |
D | MIMX8ML4_cm7.h | 3877 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/ |
D | MIMX8ML3_cm7.h | 3877 __IO uint32_t IRQ_CTRL; /**< ASRC Interrupt Control, offset: 0x178 */ member
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